基于通用FPGA XC6SLX9板的QCM传感器阵列四通道高分辨率频率计数器

A. O. Triqadafi, T. N. Zafirah, H. Dharmawan, S. Sakti
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摘要

频率计数器对于石英晶体微天平等基于共振的传感器是必不可少的。使用QCM传感器阵列的电子鼻或电子舌需要一个多通道频率计数器来同时检测传感器的频移。频率计数器的分辨率、精度和采样速度是影响频率计数器性能的重要因素。在设计中还考虑了电路板尺寸、能耗和快速部署。这项工作展示了使用商用Xilinx Spartan 6系列XC6SLX9板模块和微控制器板开发独立的多通道频率计数器。两个模块都是通用模块;因此,不需要印刷电路板设计,从而快速实现:使用FPGA导致体积紧凑,能耗低。所开发的计数器是基于利用FPGA内部逻辑块的互反计数器设计的。FPGA模块内置50 MHz TCXO时钟,作为参考时钟。通过将50 MHz时钟乘以6达到300 MHz,实现计数器的高分辨率定时。乘法利用了FPGA中的锁相环模块。通过将时钟校准为10兆赫铷振荡器,实现了计数器的高精度和准确性。通过在FPGA中实现SPI协议,实现与单片机的数据通信。通过利用锁相环和DSP块对计数器进行资源优化。只有5%的寄存器和5%的FPGA资源lut用于构建四通道频率计数器。结果表明,该计数器在10 MHz频率下可测量输入信号的频率,采样时间为1秒,分辨率为0.033 Hz。该系统已被测试用于监测QCM传感器阵列的频率变化。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Four-Channels High-Resolution Frequency Counter for QCM Sensor Array Using Generic FPGA XC6SLX9 Board
A frequency counter is essential for resonance-based sensors like quartz crystal microbalance. An electronic nose or tongue using a QCM sensor array requires a multichannel frequency counter to detect the frequency shift of the sensors simultaneously. The frequency counter’s resolution, precision, and sampling speed are important factors. Board size, energy consumption, and rapid deployment are also considered in the design. This work shows the development of an independent multichannel frequency counter using a commercial Xilinx Spartan 6 series XC6SLX9 board module and a microcontroller board. Both modules are general-purpose modules; therefore, there is no need for a printed circuit board design, resulting in a quick implementation: the use of FPGA results in a compact size and low energy consumption. The developed counter is designed based on a reciprocal counter utilizing the internal logic block of the FPGA. The FPGA module has a built-in 50 MHz TCXO clock and is the reference clock. The high-resolution timing of the counter is realized by multiplying the 50 MHz clock by 6 to reach 300 MHz. The multiplication utilizes the PLL modules in the FPGA. The high precision and accuracy of the counter are achieved by calibrating the timing clock to a 10 MHz rubidium oscillator. The data communication to the microcontroller is done via the SPI by implementing the SPI protocol in the FPGA. The resource is optimized by utilizing PLL and DSP blocks for the counter. Only 5% registers and 5% LUTs of the FPGA resource are used to build a four-channel frequency counter. The result shows that the counter can measure the frequency of incoming signals with a resolution of 0.033 Hz at 10 MHz with a sampling time of 1 second. The system has been tested to monitor the frequency changes of a QCM sensor array.
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