M. Mikhemar, A. Mirzaei, A. Hadji-Abdolhamid, J. Chiu, H. Darabi
{"title":"13.5mA sub-2.5dB NF多波段接收机","authors":"M. Mikhemar, A. Mirzaei, A. Hadji-Abdolhamid, J. Chiu, H. Darabi","doi":"10.1109/VLSIC.2012.6243800","DOIUrl":null,"url":null,"abstract":"An ultra low-power multi-band receiver covering any frequency band in the range 0.7-2.5GHz is fabricated in 40nm CMOS and occupies a total area of 1.5mm2. The receiver achieves a NF of 2.4dB, with -2dBm IIP3, and a peak SNR of 35dB, while consuming 13.5mA from the battery, more than three times power reduction compared to prior art.","PeriodicalId":6347,"journal":{"name":"2012 Symposium on VLSI Circuits (VLSIC)","volume":"21 1","pages":"82-83"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A 13.5mA sub-2.5dB NF multi-band receiver\",\"authors\":\"M. Mikhemar, A. Mirzaei, A. Hadji-Abdolhamid, J. Chiu, H. Darabi\",\"doi\":\"10.1109/VLSIC.2012.6243800\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An ultra low-power multi-band receiver covering any frequency band in the range 0.7-2.5GHz is fabricated in 40nm CMOS and occupies a total area of 1.5mm2. The receiver achieves a NF of 2.4dB, with -2dBm IIP3, and a peak SNR of 35dB, while consuming 13.5mA from the battery, more than three times power reduction compared to prior art.\",\"PeriodicalId\":6347,\"journal\":{\"name\":\"2012 Symposium on VLSI Circuits (VLSIC)\",\"volume\":\"21 1\",\"pages\":\"82-83\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 Symposium on VLSI Circuits (VLSIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2012.6243800\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 Symposium on VLSI Circuits (VLSIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2012.6243800","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An ultra low-power multi-band receiver covering any frequency band in the range 0.7-2.5GHz is fabricated in 40nm CMOS and occupies a total area of 1.5mm2. The receiver achieves a NF of 2.4dB, with -2dBm IIP3, and a peak SNR of 35dB, while consuming 13.5mA from the battery, more than three times power reduction compared to prior art.