{"title":"一种具有高灵活性的软件定义收发器的设计","authors":"Wei Song, Yusong Wu, Heng Huang, Milin Zhang","doi":"10.1109/ICICM54364.2021.9660248","DOIUrl":null,"url":null,"abstract":"This paper proposed a design of software-defined transceiver: A low-power digital baseband processor (DBP) was designed and fabricated in $40 nm$ CMOS process. The modulator and channel coding parameters of the DBP can be re-configured while the proposed design is used in different scenarios. A design flow of software-defined transceivers based on a COTS (Commercial Off-the-Shelf) radio platform was proposed. A programmable transceiver paired with the DBP was proposed and implemented on this platform, enabling the ability to interface with different higher layer protocols. Simulation results show that the DBP consumes $92.8 \\mu W$ power in a work load of 840 kbps, and the programmable transceiver can achieve a bit error rate of $10^{-4}$ at the signal to noise ratio of 15 dB. The proposed transceiver has been verified in the bench test.","PeriodicalId":6693,"journal":{"name":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"27 1","pages":"323-327"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of a Software-Defined Transceiver with High Flexibility for Sensing Applications\",\"authors\":\"Wei Song, Yusong Wu, Heng Huang, Milin Zhang\",\"doi\":\"10.1109/ICICM54364.2021.9660248\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposed a design of software-defined transceiver: A low-power digital baseband processor (DBP) was designed and fabricated in $40 nm$ CMOS process. The modulator and channel coding parameters of the DBP can be re-configured while the proposed design is used in different scenarios. A design flow of software-defined transceivers based on a COTS (Commercial Off-the-Shelf) radio platform was proposed. A programmable transceiver paired with the DBP was proposed and implemented on this platform, enabling the ability to interface with different higher layer protocols. Simulation results show that the DBP consumes $92.8 \\\\mu W$ power in a work load of 840 kbps, and the programmable transceiver can achieve a bit error rate of $10^{-4}$ at the signal to noise ratio of 15 dB. The proposed transceiver has been verified in the bench test.\",\"PeriodicalId\":6693,\"journal\":{\"name\":\"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"volume\":\"27 1\",\"pages\":\"323-327\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-10-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICM54364.2021.9660248\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM54364.2021.9660248","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of a Software-Defined Transceiver with High Flexibility for Sensing Applications
This paper proposed a design of software-defined transceiver: A low-power digital baseband processor (DBP) was designed and fabricated in $40 nm$ CMOS process. The modulator and channel coding parameters of the DBP can be re-configured while the proposed design is used in different scenarios. A design flow of software-defined transceivers based on a COTS (Commercial Off-the-Shelf) radio platform was proposed. A programmable transceiver paired with the DBP was proposed and implemented on this platform, enabling the ability to interface with different higher layer protocols. Simulation results show that the DBP consumes $92.8 \mu W$ power in a work load of 840 kbps, and the programmable transceiver can achieve a bit error rate of $10^{-4}$ at the signal to noise ratio of 15 dB. The proposed transceiver has been verified in the bench test.