{"title":"机械稳定的超低k介电和气隙技术","authors":"C. Prawoto, Ying Xiao, M. Chan","doi":"10.1109/CSTIC49141.2020.9282594","DOIUrl":null,"url":null,"abstract":"This paper described two approaches using structured voids in the dielectric among the interconnect metals to achieve low interlayer and intralayer capacitance while maintaining sufficient mechanical strength to withstand the CMP process. The first approach is to use vertically aligned voids and experimental results show that it can be used to achieve very high porosity with much stronger mechanical strength than conventional structures. To further reduce the intralayer dielectric constant, air-gap technology with large void-to-solid ratio has been proposed. The fabrication method and measurement results are presented.","PeriodicalId":6848,"journal":{"name":"2020 China Semiconductor Technology International Conference (CSTIC)","volume":"41 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Mechanically Stable Ultra-Low-K Dielectric and Air-Gap Technology\",\"authors\":\"C. Prawoto, Ying Xiao, M. Chan\",\"doi\":\"10.1109/CSTIC49141.2020.9282594\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper described two approaches using structured voids in the dielectric among the interconnect metals to achieve low interlayer and intralayer capacitance while maintaining sufficient mechanical strength to withstand the CMP process. The first approach is to use vertically aligned voids and experimental results show that it can be used to achieve very high porosity with much stronger mechanical strength than conventional structures. To further reduce the intralayer dielectric constant, air-gap technology with large void-to-solid ratio has been proposed. The fabrication method and measurement results are presented.\",\"PeriodicalId\":6848,\"journal\":{\"name\":\"2020 China Semiconductor Technology International Conference (CSTIC)\",\"volume\":\"41 1\",\"pages\":\"1-4\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 China Semiconductor Technology International Conference (CSTIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSTIC49141.2020.9282594\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 China Semiconductor Technology International Conference (CSTIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSTIC49141.2020.9282594","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Mechanically Stable Ultra-Low-K Dielectric and Air-Gap Technology
This paper described two approaches using structured voids in the dielectric among the interconnect metals to achieve low interlayer and intralayer capacitance while maintaining sufficient mechanical strength to withstand the CMP process. The first approach is to use vertically aligned voids and experimental results show that it can be used to achieve very high porosity with much stronger mechanical strength than conventional structures. To further reduce the intralayer dielectric constant, air-gap technology with large void-to-solid ratio has been proposed. The fabrication method and measurement results are presented.