{"title":"OPTIMISTA:异步FSMs的状态最小化,以获得最佳输出逻辑","authors":"Robert M. Fuhrer, S. Nowick","doi":"10.1109/ICCAD.1999.810610","DOIUrl":null,"url":null,"abstract":"The optimal state minimization problem is to select a reduced state machine having the best logic implementation over all possible state reductions and encodings. The OPTIMIST (OPTImal MInimization of STates) algorithm (R.M. Fuhrer et al., 1997) was the first general solution to this problem for synchronous finite state machines (FSMs). In this paper, we present the first solution for asynchronous FSMs. This paper makes two contributions. First, we introduce OPTIMISTA (OPTIMIST-Asynchronous), a new algorithm which guarantees optimum 2-level output logic for asynchronous FSMs. In asynchronous machines, output logic is often critical: it usually determines the machine latency. The algorithm is formulated as a binate constraint satisfaction problem, which is solved using a binate solver. The second contribution is a novel alternative result: the unreduced machine itself can be used directly to obtain minimum-cardinality output logic. Thus, this paper presents two approaches: using OPTIMISTA, which simultaneously performs state and logic minimization; or using no state reduction (if output logic cardinality is of sole interest). Extensions for literal optimization, targetted to multi-level logic, are also proposed.","PeriodicalId":6414,"journal":{"name":"1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1999-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"OPTIMISTA: state minimization of asynchronous FSMs for optimum output logic\",\"authors\":\"Robert M. Fuhrer, S. Nowick\",\"doi\":\"10.1109/ICCAD.1999.810610\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The optimal state minimization problem is to select a reduced state machine having the best logic implementation over all possible state reductions and encodings. The OPTIMIST (OPTImal MInimization of STates) algorithm (R.M. Fuhrer et al., 1997) was the first general solution to this problem for synchronous finite state machines (FSMs). In this paper, we present the first solution for asynchronous FSMs. This paper makes two contributions. First, we introduce OPTIMISTA (OPTIMIST-Asynchronous), a new algorithm which guarantees optimum 2-level output logic for asynchronous FSMs. In asynchronous machines, output logic is often critical: it usually determines the machine latency. The algorithm is formulated as a binate constraint satisfaction problem, which is solved using a binate solver. The second contribution is a novel alternative result: the unreduced machine itself can be used directly to obtain minimum-cardinality output logic. Thus, this paper presents two approaches: using OPTIMISTA, which simultaneously performs state and logic minimization; or using no state reduction (if output logic cardinality is of sole interest). Extensions for literal optimization, targetted to multi-level logic, are also proposed.\",\"PeriodicalId\":6414,\"journal\":{\"name\":\"1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-11-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCAD.1999.810610\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCAD.1999.810610","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
OPTIMISTA: state minimization of asynchronous FSMs for optimum output logic
The optimal state minimization problem is to select a reduced state machine having the best logic implementation over all possible state reductions and encodings. The OPTIMIST (OPTImal MInimization of STates) algorithm (R.M. Fuhrer et al., 1997) was the first general solution to this problem for synchronous finite state machines (FSMs). In this paper, we present the first solution for asynchronous FSMs. This paper makes two contributions. First, we introduce OPTIMISTA (OPTIMIST-Asynchronous), a new algorithm which guarantees optimum 2-level output logic for asynchronous FSMs. In asynchronous machines, output logic is often critical: it usually determines the machine latency. The algorithm is formulated as a binate constraint satisfaction problem, which is solved using a binate solver. The second contribution is a novel alternative result: the unreduced machine itself can be used directly to obtain minimum-cardinality output logic. Thus, this paper presents two approaches: using OPTIMISTA, which simultaneously performs state and logic minimization; or using no state reduction (if output logic cardinality is of sole interest). Extensions for literal optimization, targetted to multi-level logic, are also proposed.