MPEG2分层运动估计器的VLSI实现MP@HL

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI:10.1109/CICC.1996.510573

T. Onoye, G. Fujita, I. Shirakawa, K. Matsumura, H. Ariyoshi, S. Tsukiyama

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引用次数: 0

摘要

一个专用于MPEG2的VLSI运动估计器MP@HL已经开发。运动矢量检测采用两级分层搜索算法，与传统算法相比，计算量可减少1/70。所提出的运动估计器集成在0.6 /spl mu/m的三金属CMOS芯片中，该芯片在12.2/spl times/12.7 mm/sup 2/ die上包含1200 K晶体管。输入时钟速率可以达到133 MHz，这使得MPEG2的实时运动估计MP@HL成为可能。

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VLSI implementation of hierarchical motion estimator for MPEG2 MP@HL

A VLSI motion estimator dedicated to MPEG2 MP@HL has been developed. Adopting a two-level hierarchical searching algorithm in detecting motion vectors, the computational labor can be reduced by 1/70 in comparison with the conventional algorithm. The proposed motion estimator is integrated in a 0.6 /spl mu/m triple-metal CMOS chip which contains 1,200 K transistors on a 12.2/spl times/12.7 mm/sup 2/ die. The input clock rate can be attained up to 133 MHz, which enables the real time motion estimation for MPEG2 MP@HL.

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来源期刊

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference

CiteScore

3.80

自引率

0.00%

发文量