{"title":"FinFET技术在先进节点上的扩展挑战及其对SoC设计的影响(特邀)","authors":"S. Banna","doi":"10.1109/CICC.2015.7338378","DOIUrl":null,"url":null,"abstract":"With the introduction of FinFET technology in mass production, more designs and complex designs are being ported on 22nm and 14nm/16nm FinFET transistors. However, all FinFET transistors are not made equal to offer best System-on-Chip (SoC) performance and power benefits. Careful selection of fin structural parameters is critical for best SoC performance. This paper discusses FinFET scaling challenges, their impact on SoC performance, key trade-offs and possible solutions for best SoC performance at current and future technology nodes.","PeriodicalId":6665,"journal":{"name":"2015 IEEE Custom Integrated Circuits Conference (CICC)","volume":"105 1","pages":"1-8"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Scaling challenges of FinFET technology at advanced nodes and its impact on SoC design (Invited)\",\"authors\":\"S. Banna\",\"doi\":\"10.1109/CICC.2015.7338378\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With the introduction of FinFET technology in mass production, more designs and complex designs are being ported on 22nm and 14nm/16nm FinFET transistors. However, all FinFET transistors are not made equal to offer best System-on-Chip (SoC) performance and power benefits. Careful selection of fin structural parameters is critical for best SoC performance. This paper discusses FinFET scaling challenges, their impact on SoC performance, key trade-offs and possible solutions for best SoC performance at current and future technology nodes.\",\"PeriodicalId\":6665,\"journal\":{\"name\":\"2015 IEEE Custom Integrated Circuits Conference (CICC)\",\"volume\":\"105 1\",\"pages\":\"1-8\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE Custom Integrated Circuits Conference (CICC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2015.7338378\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Custom Integrated Circuits Conference (CICC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2015.7338378","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Scaling challenges of FinFET technology at advanced nodes and its impact on SoC design (Invited)
With the introduction of FinFET technology in mass production, more designs and complex designs are being ported on 22nm and 14nm/16nm FinFET transistors. However, all FinFET transistors are not made equal to offer best System-on-Chip (SoC) performance and power benefits. Careful selection of fin structural parameters is critical for best SoC performance. This paper discusses FinFET scaling challenges, their impact on SoC performance, key trade-offs and possible solutions for best SoC performance at current and future technology nodes.