{"title":"FPGA实现的FDTD数据流机","authors":"S. Matsuoka, H. Kawaguchi","doi":"10.1109/WCT.2003.1321585","DOIUrl":null,"url":null,"abstract":"Aiming at ultra high performance computing in electromagnetic field simulation, the authors have been working on the development of an FDTD dedicated computer (Kawaguchi, H. et al., IEEE Trans. Magn., vol.38, no.2, p.689-62, 2002). The FDTD method is a very simple algorithm, which can be utilized by a relatively small digital circuit. The authors have already presented a basic design and logic simulation of. the dedicated computer architecture. This paper presents an implementation of the FDTD dedicated computer by means of the FPGA whose design and logic simulation have already been done using VHDL design software.","PeriodicalId":6305,"journal":{"name":"2003 IEEE Topical Conference on Wireless Communication Technology","volume":"8 1","pages":"418-419"},"PeriodicalIF":0.0000,"publicationDate":"2003-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"FPGA implementation of the FDTD data flow machine\",\"authors\":\"S. Matsuoka, H. Kawaguchi\",\"doi\":\"10.1109/WCT.2003.1321585\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Aiming at ultra high performance computing in electromagnetic field simulation, the authors have been working on the development of an FDTD dedicated computer (Kawaguchi, H. et al., IEEE Trans. Magn., vol.38, no.2, p.689-62, 2002). The FDTD method is a very simple algorithm, which can be utilized by a relatively small digital circuit. The authors have already presented a basic design and logic simulation of. the dedicated computer architecture. This paper presents an implementation of the FDTD dedicated computer by means of the FPGA whose design and logic simulation have already been done using VHDL design software.\",\"PeriodicalId\":6305,\"journal\":{\"name\":\"2003 IEEE Topical Conference on Wireless Communication Technology\",\"volume\":\"8 1\",\"pages\":\"418-419\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-10-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2003 IEEE Topical Conference on Wireless Communication Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WCT.2003.1321585\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 IEEE Topical Conference on Wireless Communication Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WCT.2003.1321585","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
摘要
针对电磁场仿真中的超高性能计算，作者一直致力于FDTD专用计算机的开发(Kawaguchi, H. et al.， IEEE Trans.;粉剂。第38卷，没有。2，第689-62页，2002)。时域有限差分法是一种非常简单的算法，可以在相对较小的数字电路中使用。作者已经给出了一个基本的设计和逻辑仿真。专用计算机体系结构。本文介绍了一种用FPGA实现FDTD专用计算机的方法，该方法已经用VHDL设计软件进行了设计和逻辑仿真。
Aiming at ultra high performance computing in electromagnetic field simulation, the authors have been working on the development of an FDTD dedicated computer (Kawaguchi, H. et al., IEEE Trans. Magn., vol.38, no.2, p.689-62, 2002). The FDTD method is a very simple algorithm, which can be utilized by a relatively small digital circuit. The authors have already presented a basic design and logic simulation of. the dedicated computer architecture. This paper presents an implementation of the FDTD dedicated computer by means of the FPGA whose design and logic simulation have already been done using VHDL design software.
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