一种使用并行性的混合信号决策反馈均衡器

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference Pub Date : 1996-05-05 DOI:10.1109/CICC.1996.510503

R. Kajley, J.E.C. Brown, P. Hurst

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引用次数: 5

摘要

介绍了一种利用并行性的混合信号决策反馈均衡器(DFE)。与传统DFE相比，预见性DFE的并行性提高了数据速率。DFE在2-/spl mu/m CMOS工艺中占用23 mm/sup / 2/ 2，工作速度为55 Mb/s，功耗为450 mW。

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A mixed-signal decision-feedback equalizer that uses parallelism

A mixed-signal decision-feedback equalizer (DFE) that uses parallelism is described. The parallelism in the look-ahead DFE achieves an increase in the data rate over that of a conventional DFE. The DFE occupies 23 mm/sup 2/ in a 2-/spl mu/m CMOS process, operates at 55 Mb/s and dissipates 450 mW.

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来源期刊

Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference

CiteScore

3.80

自引率

0.00%

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