基于VHDL语言的EPM3128测量频率的研究

Zhang Zisheng, Lian Ya-fei, Ding Qian, Ji Ying-chao, Li Guan
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引用次数: 0

摘要

基于EDA技术的芯片设计正在成为电子系统设计的主流。该项目的目标是使用EPM3128实现更好的测量方法和测量频率的乘法。详细地完成了VHDL编程和时序仿真。为了实现测量和被测频率的倍增,需要实现同步。记录晶体振荡器信号的数量,然后CPU通过锁存器读入计数器中的数据。更重要的是,由于n位右移,测量中记录的数据减少到1/2n倍。每次计数器到期时,将输出一个窄脉冲。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The study of the measured frequency in EPM3128 based on the VHDL language
The chip design based on EDA technology is becoming the mainstream of the electronic system design. The objective of this project is to achieve a better method of the measurement and the multiplication of the measured frequency using the EPM3128. Both the VHDL programms and the timing emulations are achieved detailedly. In order to realized the measurement and the multiplication of the mearsured frequency, the synchronization should be achieved. The number of the crystal oscillator signal is been recorded, and then the CPU reads the data in the counter through the fip-latch. What's more, because of the n-bit right shift, the data recorded in the measurement is reduced to the 1/2n times. A narrow pulse will be outputted each time a expiration of the counter arrives.
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