T. Takemoto, Y. Matsuoka, H. Yamashita, Yong Lee, K. Akita, H. Arimoto, M. Kokubo, T. Ido
{"title":"基于0.18µm SiGe BiCMOS技术的50.6 Gb/s 7.8 mw /Gb/s−7.4 dbm灵敏度光接收机","authors":"T. Takemoto, Y. Matsuoka, H. Yamashita, Yong Lee, K. Akita, H. Arimoto, M. Kokubo, T. Ido","doi":"10.1109/VLSIC.2016.7573542","DOIUrl":null,"url":null,"abstract":"A 50.6-Gb/s optical receiver (RX) based on the 0.18-μm SiGe BiCMOS technology was fabricated and evaluated. To improve phase margin and sensitivity of the RX without degrading its power efficiency, it was configured with a two-stage pre-amplifier (preamp) with high gain (56 dBΩ) and power-supply-variation (PSV) canceller for improving sensitivity. The RX achieves sensitivity of -7.4 dBm and phase margin of 0.51 UI at 50.6 Gb/s, while its power consumption is 7.8 mW/Gb/s.","PeriodicalId":6512,"journal":{"name":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","volume":"7 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A 50.6-Gb/s 7.8-mW/Gb/s −7.4-dBm sensitivity optical receiver based on 0.18-µm SiGe BiCMOS technology\",\"authors\":\"T. Takemoto, Y. Matsuoka, H. Yamashita, Yong Lee, K. Akita, H. Arimoto, M. Kokubo, T. Ido\",\"doi\":\"10.1109/VLSIC.2016.7573542\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 50.6-Gb/s optical receiver (RX) based on the 0.18-μm SiGe BiCMOS technology was fabricated and evaluated. To improve phase margin and sensitivity of the RX without degrading its power efficiency, it was configured with a two-stage pre-amplifier (preamp) with high gain (56 dBΩ) and power-supply-variation (PSV) canceller for improving sensitivity. The RX achieves sensitivity of -7.4 dBm and phase margin of 0.51 UI at 50.6 Gb/s, while its power consumption is 7.8 mW/Gb/s.\",\"PeriodicalId\":6512,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"volume\":\"7 1\",\"pages\":\"1-2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2016.7573542\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2016.7573542","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 50.6-Gb/s 7.8-mW/Gb/s −7.4-dBm sensitivity optical receiver based on 0.18-µm SiGe BiCMOS technology
A 50.6-Gb/s optical receiver (RX) based on the 0.18-μm SiGe BiCMOS technology was fabricated and evaluated. To improve phase margin and sensitivity of the RX without degrading its power efficiency, it was configured with a two-stage pre-amplifier (preamp) with high gain (56 dBΩ) and power-supply-variation (PSV) canceller for improving sensitivity. The RX achieves sensitivity of -7.4 dBm and phase margin of 0.51 UI at 50.6 Gb/s, while its power consumption is 7.8 mW/Gb/s.