Dominik Koch, Julian Weimer, Mathias C. J. Weiser, Jan Hueckelheim, I. Kallfass
{"title":"用于轻度混合应用的低压大电流GaN功率晶体管并联工作的栅极驱动器概念","authors":"Dominik Koch, Julian Weimer, Mathias C. J. Weiser, Jan Hueckelheim, I. Kallfass","doi":"10.1109/APEC42165.2021.9487194","DOIUrl":null,"url":null,"abstract":"In this work experimental and simulative proof of a concept for paralleling low voltage and high current Gallium Nitride (GaN) transistors each with a distinct gate booster is presented. For both high-side (HS) and low-side (LS), two 100V 5mΩ normally-off GaN-HEMTs are operated with a driver, which offers separate paths for turn-on and turn-off. In combination with the Kelvin source a minimal gate-loop inductance and stable switching operation is achieved. The HS and LS signals are provided by an isolated half-bridge driver with ultra-low jitter and identical PCB path lengths to ensure equal propagation delay. The half-bridge with paralleled GaN-HEMTs, which is approved by full-wave S-parameter extraction in combination with a comprehensive thermal simulation and a transient simulation based on a physical GaN model, is operated in a 300kHz48V-to-24V buck converter operation up to 54A output current with an overall efficiency of above 95%. The output power of the converter is mainly limited by the thermal performance of the packaging and the PCB and the single gate-contact of the transistors, which is reducing the degrees of freedoms in the layout and introducing significant common source and parasitic inductances.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Gate Driver Concept for Parallel Operation of Low-Voltage High-Current GaN Power Transistors for Mild-Hybrid Applications\",\"authors\":\"Dominik Koch, Julian Weimer, Mathias C. J. Weiser, Jan Hueckelheim, I. Kallfass\",\"doi\":\"10.1109/APEC42165.2021.9487194\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work experimental and simulative proof of a concept for paralleling low voltage and high current Gallium Nitride (GaN) transistors each with a distinct gate booster is presented. For both high-side (HS) and low-side (LS), two 100V 5mΩ normally-off GaN-HEMTs are operated with a driver, which offers separate paths for turn-on and turn-off. In combination with the Kelvin source a minimal gate-loop inductance and stable switching operation is achieved. The HS and LS signals are provided by an isolated half-bridge driver with ultra-low jitter and identical PCB path lengths to ensure equal propagation delay. The half-bridge with paralleled GaN-HEMTs, which is approved by full-wave S-parameter extraction in combination with a comprehensive thermal simulation and a transient simulation based on a physical GaN model, is operated in a 300kHz48V-to-24V buck converter operation up to 54A output current with an overall efficiency of above 95%. The output power of the converter is mainly limited by the thermal performance of the packaging and the PCB and the single gate-contact of the transistors, which is reducing the degrees of freedoms in the layout and introducing significant common source and parasitic inductances.\",\"PeriodicalId\":7050,\"journal\":{\"name\":\"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-06-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APEC42165.2021.9487194\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC42165.2021.9487194","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Gate Driver Concept for Parallel Operation of Low-Voltage High-Current GaN Power Transistors for Mild-Hybrid Applications
In this work experimental and simulative proof of a concept for paralleling low voltage and high current Gallium Nitride (GaN) transistors each with a distinct gate booster is presented. For both high-side (HS) and low-side (LS), two 100V 5mΩ normally-off GaN-HEMTs are operated with a driver, which offers separate paths for turn-on and turn-off. In combination with the Kelvin source a minimal gate-loop inductance and stable switching operation is achieved. The HS and LS signals are provided by an isolated half-bridge driver with ultra-low jitter and identical PCB path lengths to ensure equal propagation delay. The half-bridge with paralleled GaN-HEMTs, which is approved by full-wave S-parameter extraction in combination with a comprehensive thermal simulation and a transient simulation based on a physical GaN model, is operated in a 300kHz48V-to-24V buck converter operation up to 54A output current with an overall efficiency of above 95%. The output power of the converter is mainly limited by the thermal performance of the packaging and the PCB and the single gate-contact of the transistors, which is reducing the degrees of freedoms in the layout and introducing significant common source and parasitic inductances.