W. Lai, Jhe-Wei Jhuang, S. Jang, Guan-Yu Lin, C. Hsue
{"title":"宽带注入锁定倍频器","authors":"W. Lai, Jhe-Wei Jhuang, S. Jang, Guan-Yu Lin, C. Hsue","doi":"10.1109/APCCAS.2016.7803950","DOIUrl":null,"url":null,"abstract":"This letter proposes a dual-resonance CMOS LC-tank injection locked frequency doubler (ILFD) fabricated in the 0.18 μm CMOS process and describes the circuit design, operation principle and measurement results of the ILFD. The ILFD circuit is composed of a RLC dual-resonance first-harmonic injection-locked oscillator (ILO), a wide-band frequency doubler with differential-injection ports. The ILFD uses resistors to degrade the resonator quality factor and enhance the locking range. At the supply voltage of 1.65 V, the dc power consumption is 7.71 mW. At the incident power of 0 dBm, the ILFD has locking range from the incident frequency 3.9 GHz to 8.2 GHz.","PeriodicalId":6495,"journal":{"name":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"73 1","pages":"265-268"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Wide-band injection-locked frequency doubler\",\"authors\":\"W. Lai, Jhe-Wei Jhuang, S. Jang, Guan-Yu Lin, C. Hsue\",\"doi\":\"10.1109/APCCAS.2016.7803950\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This letter proposes a dual-resonance CMOS LC-tank injection locked frequency doubler (ILFD) fabricated in the 0.18 μm CMOS process and describes the circuit design, operation principle and measurement results of the ILFD. The ILFD circuit is composed of a RLC dual-resonance first-harmonic injection-locked oscillator (ILO), a wide-band frequency doubler with differential-injection ports. The ILFD uses resistors to degrade the resonator quality factor and enhance the locking range. At the supply voltage of 1.65 V, the dc power consumption is 7.71 mW. At the incident power of 0 dBm, the ILFD has locking range from the incident frequency 3.9 GHz to 8.2 GHz.\",\"PeriodicalId\":6495,\"journal\":{\"name\":\"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"volume\":\"73 1\",\"pages\":\"265-268\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCCAS.2016.7803950\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2016.7803950","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This letter proposes a dual-resonance CMOS LC-tank injection locked frequency doubler (ILFD) fabricated in the 0.18 μm CMOS process and describes the circuit design, operation principle and measurement results of the ILFD. The ILFD circuit is composed of a RLC dual-resonance first-harmonic injection-locked oscillator (ILO), a wide-band frequency doubler with differential-injection ports. The ILFD uses resistors to degrade the resonator quality factor and enhance the locking range. At the supply voltage of 1.65 V, the dc power consumption is 7.71 mW. At the incident power of 0 dBm, the ILFD has locking range from the incident frequency 3.9 GHz to 8.2 GHz.
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