{"title":"电路极限和器件噪声对RRAM条件生成对抗网络的影响","authors":"Shengyu Bao, Zongwei Wang, Tianyi Liu, Daqin Chen, Yimao Cai, Ru Huang","doi":"10.1109/CSTIC49141.2020.9282546","DOIUrl":null,"url":null,"abstract":"In this work, a Conditional Generative Adversarial Network (CGAN) [1] is demonstrated based on the Resistive Random Access Memory (RRAM). During training, the read noise of RRAM is utilized as a random bias source to enrich the diversity of the generator in CGAN. Further, we evaluate the impact of both read noise (RRAM as weight storage cell) and the resolution of the AD/DA circuit on the performance of CGAN through a comprehensive simulation.","PeriodicalId":6848,"journal":{"name":"2020 China Semiconductor Technology International Conference (CSTIC)","volume":"19 1","pages":"1-3"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Impact of Circuit Limit and Device Noise on RRAM Based Conditional Generative Adversarial Network\",\"authors\":\"Shengyu Bao, Zongwei Wang, Tianyi Liu, Daqin Chen, Yimao Cai, Ru Huang\",\"doi\":\"10.1109/CSTIC49141.2020.9282546\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work, a Conditional Generative Adversarial Network (CGAN) [1] is demonstrated based on the Resistive Random Access Memory (RRAM). During training, the read noise of RRAM is utilized as a random bias source to enrich the diversity of the generator in CGAN. Further, we evaluate the impact of both read noise (RRAM as weight storage cell) and the resolution of the AD/DA circuit on the performance of CGAN through a comprehensive simulation.\",\"PeriodicalId\":6848,\"journal\":{\"name\":\"2020 China Semiconductor Technology International Conference (CSTIC)\",\"volume\":\"19 1\",\"pages\":\"1-3\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 China Semiconductor Technology International Conference (CSTIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSTIC49141.2020.9282546\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 China Semiconductor Technology International Conference (CSTIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSTIC49141.2020.9282546","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Impact of Circuit Limit and Device Noise on RRAM Based Conditional Generative Adversarial Network
In this work, a Conditional Generative Adversarial Network (CGAN) [1] is demonstrated based on the Resistive Random Access Memory (RRAM). During training, the read noise of RRAM is utilized as a random bias source to enrich the diversity of the generator in CGAN. Further, we evaluate the impact of both read noise (RRAM as weight storage cell) and the resolution of the AD/DA circuit on the performance of CGAN through a comprehensive simulation.
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