{"title":"用最小寄存器数的CSD设计FIR滤波器","authors":"K. Suzuki, H. Ochi, S. Kinjo","doi":"10.1109/APCAS.1996.569260","DOIUrl":null,"url":null,"abstract":"This paper proposes an algorithm to be used for the VLSI design of a FIR filter using a canonical signed digit (CSD) representation with a minimum number of registers. The coefficients represented by CSD have a common digit pattern, so that they can reduce the number of adders to calculate same digit patterns. The proposed method takes advantage of this technique without using more registers than that of the transfer function.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"A design of FIR filter using CSD with minimum number of registers\",\"authors\":\"K. Suzuki, H. Ochi, S. Kinjo\",\"doi\":\"10.1109/APCAS.1996.569260\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes an algorithm to be used for the VLSI design of a FIR filter using a canonical signed digit (CSD) representation with a minimum number of registers. The coefficients represented by CSD have a common digit pattern, so that they can reduce the number of adders to calculate same digit patterns. The proposed method takes advantage of this technique without using more registers than that of the transfer function.\",\"PeriodicalId\":20507,\"journal\":{\"name\":\"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-11-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCAS.1996.569260\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCAS.1996.569260","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A design of FIR filter using CSD with minimum number of registers
This paper proposes an algorithm to be used for the VLSI design of a FIR filter using a canonical signed digit (CSD) representation with a minimum number of registers. The coefficients represented by CSD have a common digit pattern, so that they can reduce the number of adders to calculate same digit patterns. The proposed method takes advantage of this technique without using more registers than that of the transfer function.
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