5Gb/s/引脚16Gb LPDDR4/4X可重构SDRAM,具有高电压保持器和基于预测的快速跟踪ZQ校准

Jin-Seok Heo, Kihan Kim, Donghun Lee, Chang-Kyo Lee, Daesik Moon, KihongParktandChong-kwon Kim, Jin-Hyeok Baek, Sung-woo Yoon, Hui-Kap Yang, Kyung-Soo Kim, Youngjae Kim, Bok-Gue Park, Su-Jin Park, Joungwook Moon, Jae-Hyung Lee, Y. Park, Soobong Jang, S. Hyun, H. Kwon, J. Choi, Y. Sohn, Seung-Jun Bae, Kwang-il Park, Jung-Bae Lee
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引用次数: 0

摘要

采用5Gb/s/引脚16Gb LPDDR4/4X可重构SDRAM,采用自模式检测方案、用于未终止负载的高电压保持器(VHK)和基于预测的快速跟踪ZQ算法。根据I/O供电电压$(V_{DDQ})$,提供可重构的LVSTL和模式检测方案,以支持两种不同的DRAM接口标准(LPDDR4/4X),所提出的设计可以保持系统兼容性和遗留控制器和PHY结构的使用寿命。LPDDR4的VHK通过控制泄漏电流减轻符号间干扰(ISI),实现了与LPDDR4X类似的3.2Gb/s的无端接负载运行。在ZQ标定中,本文提出的ZQ算法实现了快速的ZQ码搜索,在PVT变化情况下,标定时间可减少30%。此外,还采用了一种内部ZQ校准(IZQC),以最大限度地减少驾驶员强度对PVT变化的影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 5Gb/s/pin 16Gb LPDDR4/4X Reconfigurable SDRAM with Voltage-High Keeper and a Prediction-based Fast-tracking ZQ Calibration
A 5Gb/s/pin 16Gb LPDDR4/4X reconfigurable SDRAM with a self-mode detection scheme, a voltage-high keeper (VHK) for un-terminated load and a prediction-based fast-tracking ZQ algorithm is implemented in 10nm class ($2^{nd}$ generation) DRAM process. Providing a reconfigurable LVSTL with a mode detection scheme to support two different DRAM interface standards (LPDDR4/4X) depending on I/O supply voltage $(V_{DDQ})$, a proposed design can maintain the system compatibility and longevity to the legacy controller and the PHY structure. The VHK for LPDDR4 enables the 3.2Gb/s operation in the un-terminated load similar to LPDDR4X by alleviating the inter symbol interference (ISI) through the controlled leakage current. In a ZQ calibration, the proposed ZQ algorithm achieves fast ZQ code searching, the calibration time can be reduced by 30% in PVT variation. Moreover, an internal ZQ calibration (IZQC) is newly adopted to minimize the variation of the driver strength to PVT variation.
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