低功耗粗粒度可重构阵列的动态压缩上下文架构

Yoonjin Kim, R. Mahapatra
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引用次数: 3

摘要

大多数粗粒度可重构阵列架构(CGRAs)由可重构ALU阵列和配置缓存(或上下文内存)组成,以实现高性能和灵活性。特别地,配置缓存是CGRA的主要组成部分,它为每个周期的动态重新配置提供了独特的特性。但是,动态重新配置的频繁内存读取操作会导致大量的功耗。因此,降低配置缓存中的功耗对于CGRA在嵌入式系统中使用时更具竞争力和可靠性变得至关重要。在本文中,我们提出了动态压缩上下文架构,以节省配置缓存的功耗。这种高效的上下文体系结构设计不会降低CGRA的性能和灵活性。实验结果表明,该方法在配置缓存时节省了39.72%的功耗,而面积开销可以忽略不计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Dynamically compressible context architecture for low power coarse-grained reconfigurable array
Most of the coarse-grained reconfigurable array architectures (CGRAs) are composed of reconfigurable ALU arrays and configuration cache (or context memory) to achieve high performance and flexibility. Specially, configuration cache is the main component in CGRA that provides distinct feature for dynamic reconfiguration in every cycle. However, frequent memory-read operations for dynamic reconfiguration cause much power consumption. Thus, reducing power in configuration cache has become critical for CGRA to be more competitive and reliable for its use in embedded systems. In this paper, we propose dynamically compressible context architecture for power saving in configuration cache. This power-efficient design of context architecture works without degrading the performance and flexibility of CGRA. Experimental results show that the proposed approach saves up to 39.72% power in configuration cache with negligible area overhead.
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