28nm FDSOI中快速、灵活、正负自适应体偏发生器

Milovan Blagojevic, M. Cochet, Ben Keller, P. Flatresse, A. Vladimirescu, B. Nikolić
{"title":"28nm FDSOI中快速、灵活、正负自适应体偏发生器","authors":"Milovan Blagojevic, M. Cochet, Ben Keller, P. Flatresse, A. Vladimirescu, B. Nikolić","doi":"10.1109/VLSIC.2016.7573479","DOIUrl":null,"url":null,"abstract":"This work demonstrates a fully-integrated, compact body-bias generator (BBG) with a fine voltage step and sub-100ns response time for use in process and voltage compensation as well as dynamic energy optimization. The generator is implemented in 28nm UTBB FDSOI, using only 1.0V core and 1.8V IO voltage inputs. A modular design enables easy integration into target mobile SoCs, scalable to power domains of any size. The fine resolution (5mV Vth), 100ns full-scale and 5ns incremental step response, low power (<;10μW), and 1.2% area overhead enable fine-grained adaptive body-biasing (ABB). The ability to dynamically track a target frequency within 1% for 200mV of VCORE change is demonstrated experimentally.","PeriodicalId":6512,"journal":{"name":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","volume":"125 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"50","resultStr":"{\"title\":\"A fast, flexible, positive and negative adaptive body-bias generator in 28nm FDSOI\",\"authors\":\"Milovan Blagojevic, M. Cochet, Ben Keller, P. Flatresse, A. Vladimirescu, B. Nikolić\",\"doi\":\"10.1109/VLSIC.2016.7573479\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work demonstrates a fully-integrated, compact body-bias generator (BBG) with a fine voltage step and sub-100ns response time for use in process and voltage compensation as well as dynamic energy optimization. The generator is implemented in 28nm UTBB FDSOI, using only 1.0V core and 1.8V IO voltage inputs. A modular design enables easy integration into target mobile SoCs, scalable to power domains of any size. The fine resolution (5mV Vth), 100ns full-scale and 5ns incremental step response, low power (<;10μW), and 1.2% area overhead enable fine-grained adaptive body-biasing (ABB). The ability to dynamically track a target frequency within 1% for 200mV of VCORE change is demonstrated experimentally.\",\"PeriodicalId\":6512,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"volume\":\"125 1\",\"pages\":\"1-2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"50\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2016.7573479\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2016.7573479","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 50

摘要

这项工作展示了一个完全集成的,紧凑的体偏置发生器(BBG),具有良好的电压步进和低于100ns的响应时间,用于过程和电压补偿以及动态能量优化。该发生器采用28nm UTBB FDSOI实现,仅使用1.0V核心和1.8V IO电压输入。模块化设计可轻松集成到目标移动soc中,可扩展到任何尺寸的电源域。高分辨率(5mV Vth)、100ns满量程和5ns增量阶跃响应、低功耗(< 10μW)和1.2%的面积开销实现了细粒度自适应体偏置(ABB)。实验证明了在200mV VCORE变化范围内动态跟踪1%目标频率的能力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A fast, flexible, positive and negative adaptive body-bias generator in 28nm FDSOI
This work demonstrates a fully-integrated, compact body-bias generator (BBG) with a fine voltage step and sub-100ns response time for use in process and voltage compensation as well as dynamic energy optimization. The generator is implemented in 28nm UTBB FDSOI, using only 1.0V core and 1.8V IO voltage inputs. A modular design enables easy integration into target mobile SoCs, scalable to power domains of any size. The fine resolution (5mV Vth), 100ns full-scale and 5ns incremental step response, low power (<;10μW), and 1.2% area overhead enable fine-grained adaptive body-biasing (ABB). The ability to dynamically track a target frequency within 1% for 200mV of VCORE change is demonstrated experimentally.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信