A Novel Sensing Circuit with Large Sensing Margin for Embedded Spin-Transfer Torque MRAMs

Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) has emerged as a promising candidate for next-generation computing systems. However, with increasing process variation and decreasing supply voltage, a big design challenge of embedded STT-MRAMs is to guarantee negligible read-disturbance and high yield. In this paper, to deal with the read reliability challenge, a sensing circuit with strong positive feedback and a high sensing margin is proposed. It improves the sensing margin (SM) by 10.42×/3.3× and a with 1.24×/1.59× lower read energy at iso-sensing time (2ns) in comparison with the conventional sensing scheme and the state-of-the art current-sampling-based sensing circuit. Moreover the proposed scheme supports six sigma and higher yield for both states 0 and 1, while the compared schems fail.