{"title":"基于fpga的低延迟多通道视频网络传输系统设计","authors":"Jun Lu, Yao Ding","doi":"10.1109/IICSPI.2018.8690417","DOIUrl":null,"url":null,"abstract":"Based on FPGA-based real-time video data transmission and coding-decoding technology, this paper realized automatic PAL and NTSC modulation recognition with four-channel AV analog signal as the input. After BT.656 digital video signals were compressed at high compression ratio, long-distance transmission of video signals was realized through GPHY gigabit Ethernet. Uncompressed by the receiver terminal, data reached YCbCr422 through BT.656 and then were output at VGA in RGB format and at HDMI in high-definition format. four-channel AV signals were put under parallel processing, which gave full play to high concurrency of FPGA and high real-time data-handling capacity. Compared with traditional video network transmission system, latency was reduced from about 500ms to 200ms to realize low-latency multi-channel video signal network transmission based on FPGA.","PeriodicalId":6673,"journal":{"name":"2018 IEEE International Conference of Safety Produce Informatization (IICSPI)","volume":"7 1","pages":"690-693"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A FPGA-based Low-latency Multi-channel Video Network Transmission System Design\",\"authors\":\"Jun Lu, Yao Ding\",\"doi\":\"10.1109/IICSPI.2018.8690417\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Based on FPGA-based real-time video data transmission and coding-decoding technology, this paper realized automatic PAL and NTSC modulation recognition with four-channel AV analog signal as the input. After BT.656 digital video signals were compressed at high compression ratio, long-distance transmission of video signals was realized through GPHY gigabit Ethernet. Uncompressed by the receiver terminal, data reached YCbCr422 through BT.656 and then were output at VGA in RGB format and at HDMI in high-definition format. four-channel AV signals were put under parallel processing, which gave full play to high concurrency of FPGA and high real-time data-handling capacity. Compared with traditional video network transmission system, latency was reduced from about 500ms to 200ms to realize low-latency multi-channel video signal network transmission based on FPGA.\",\"PeriodicalId\":6673,\"journal\":{\"name\":\"2018 IEEE International Conference of Safety Produce Informatization (IICSPI)\",\"volume\":\"7 1\",\"pages\":\"690-693\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE International Conference of Safety Produce Informatization (IICSPI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IICSPI.2018.8690417\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Conference of Safety Produce Informatization (IICSPI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IICSPI.2018.8690417","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A FPGA-based Low-latency Multi-channel Video Network Transmission System Design
Based on FPGA-based real-time video data transmission and coding-decoding technology, this paper realized automatic PAL and NTSC modulation recognition with four-channel AV analog signal as the input. After BT.656 digital video signals were compressed at high compression ratio, long-distance transmission of video signals was realized through GPHY gigabit Ethernet. Uncompressed by the receiver terminal, data reached YCbCr422 through BT.656 and then were output at VGA in RGB format and at HDMI in high-definition format. four-channel AV signals were put under parallel processing, which gave full play to high concurrency of FPGA and high real-time data-handling capacity. Compared with traditional video network transmission system, latency was reduced from about 500ms to 200ms to realize low-latency multi-channel video signal network transmission based on FPGA.