一种基于增强矢量CORDIC的新型收缩阵列结构的QR分解的高效FPGA实现

Jianfeng Zhang, P. Chow, Hengzhu Liu
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引用次数: 3

摘要

多输入多输出(MIMO) -正交频分复用(OFDM)系统通常使用正交三角形(QR)分解。本文提出了一种基于Givens旋转法实现4 × 4实矩阵QR分解的收缩阵列结构。采用坐标旋转数字计算机(CORDIC)算法,并对其进行改进,以加快和简化Givens旋转。为了验证功能和评估性能,在Virtex 5 FPGA开发平台上对所提出的架构进行了验证。与商业实现的矢量CORDIC相比,增强的矢量CORDIC使用的硬件资源减少了37.7%,功耗减少了76.8%,在保持相同计算精度的情况下提供了1.8倍的速度提升。基于增强矢量CORDIC的新型QR收缩压阵列结构与之前最好的QR收缩压阵列相比,节省了5%的硬件,吞吐量提高了两倍,且没有精度损失。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An efficient FPGA implementation of QR decomposition using a novel systolic array architecture based on enhanced vectoring CORDIC
Multiple input multiple output (MIMO) - Orthogonal frequency division multiplexing (OFDM) systems typically use Orthogonal-triangular (QR) decomposition. In this paper, we present a novel systolic array architecture to realize QR decomposition based on the Givens rotation method for a 4 × 4 real matrix. The coordinate rotation digital computer (CORDIC) algorithm is adopted and modified to speed up and simplify the Givens rotation. To verify the function and evaluate the performance, the proposed architectures are validated on a Virtex 5 FPGA development platform. Compared to a commercial implementation of vectoring CORDIC, an enhanced vectoring CORDIC is presented that uses 37.7% less hardware resources, dissipates 76.8% less power and provides a 1.8 times speed-up while maintaining the same computation accuracy. The novel QR systolic array architecture based on the enhanced vectoring CORDIC saves 5% in hardware and the throughput is improved by a factor of two with no accuracy penalty when compared with the best previous version of the QR systolic array.
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