氮化测试晶圆回收最大延伸的先进检验方法

Yu-Yuan Ke, Kuang-Hsiu Chen, Shin-Ru Chen, Guan-Wei Huang, Wesley Yu, Po-Jen Chuang, Chun-Li Lin, Chih-Wei Huang, J. Chen, Shao-Ju Chang, Nachiketa Janardan, Tung-Ying Lee, E. Chen, Chao-Yu Cheng
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摘要

缺陷控制是半导体制造的重要环节,是器件质量的保证。一般来说,缺陷控制是使用多种类型的检测设备来发现偏移晶圆或工艺工具,并帮助确定生产过程中的缺陷来源。然而,需要仔细计算生产率和检验之间的平衡,以使制造成本最小化。一般来说,实现高生产率是半导体工厂的首要任务,要求在保持稳定的器件良率的同时节省检测成本。作为众多检查点之一,所有入厂测试晶圆都要经过无图案晶圆缺陷检查员的检验,这增加了制造成本问题。延长测试晶圆的重复使用寿命是节省成本的常见目标。本文介绍了一种先进的检测方法,以实现氮化硅(si3n4)沉积晶圆的最大回收扩展。回收延伸的检测瓶颈不仅与去除膜后表面粗糙度的增加有关,还与扫描前后被检测灵敏度的偏移值有关。Surfscan®SP3和Surfscan®SP5无图像化晶圆缺陷检测系统用于研究测试晶圆的回收扩展。此外,利用缺陷源分析(DSA)技术确定了零假加法器目标的合适预扫描灵敏度。综上所述,优化扫描后检测检波器的孔径配置可以使灵敏度偏移值最小化。基于评估的si3n4层,需要26nm的预扫描灵敏度来避免假加法器。此外,由于更好地抑制雾霾和快3倍的吞吐量,Surfscan SP5是优于Surfscan SP3的首选平台。对于演示的Si3 N4层,测试晶圆的晶圆回收时间可以达到5美元/ sim 7美元,这可以节省84%的晶圆采购。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Advanced Inspection Methodology for the Maximum Extension of Nitride Test Wafer Recycling
Defect control is an important part of semiconductor manufacturing as it ensures device quality. In general, defect control is accomplished using numerous types of inspection equipment to find excursion wafers or process tools and help identify the defect source during production. However, the balance between productivity and inspection needs to be calculated carefully to minimize the manufacturing cost. In general, achieving high productivity is the priority for a semiconductor factory, requiring inspection cost saving while still maintaining stable device yield. As one of the many inspection points, all incoming test wafers are qualified by unpatterned wafer defect inspectors, which raises cost concerns for manufacturing. Extending test wafer reuse lifetime is a common target for cost savings. In this paper, an advanced inspection methodology is described to achieve the maximum recycling extension of nitride (Si3 N4) deposited wafers. The inspection bottleneck of the recycling extension is not only related to increased surface roughness after film removal, but also to the inspected sensitivity shift value between pre-and post-scans. The Surfscan® SP3 and Surfscan® SP5 unpatterned wafer defect inspection systems are used for the study of recycling extension of test wafers. Furthermore, the technique of defect source analysis (DSA) is utilized to identify the suitable pre-scan sensitivity for the zero false adder goal. In summary, the optimization of the inspector’s aperture configuration for post-scan inspection can minimize the sensitivity shift value. Based on the evaluated Si3 N4 layers, 26nm pre-scan sensitivity is required to avoid false adders. Furthermore, the Surfscan SP5 is the preferred platform over the Surfscan SP3 due to the better suppression of haze and a 3x faster throughput. Up to $5 \sim 7$ wafer recycle times for test wafers can be achieved for the demonstrated Si3 N4 layers, which can save 84% incoming wafer purchasing.
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