A Face Mask Detection System Based on High Level Synthesis and Hardware Software Codesign

This paper presents an experimental trial of implementing a face mask detection system based on a high-level synthesis (HLS) design flow and the concept of hardware/ software codesign. The target platform is a low-cost Xilinx PYNQ-Z2 FPGA board, which is connected to a host computer and serves as a hardware accelerator performing the task of face mask detection. The development is under a PYNQ framework supporting applications, software and hardware designs. In applications, a Jupyter Notebook is used for system level control. In hardware design, a Vivado HLS IP flow is used to design the hardware computing kernel and implement the interface (overlay) between hardware and software sections. To simplify the hardware implementation complexity, the face mask detection algorithm adopts an ISP approach in lieu of complicated CNN models. The algorithm consists of color space transform, skin color detection, morphological operations, connected components labeling and horizontal edge detection. Despite its algorithmic simplicity, the proposed scheme supports multi-object detection and can exclude the interferences from non-face parts. Each module is described in C++ and translated to a corresponding hardware design module via HLS. These modules are then combined to form a hardware accelerator and integrated to the PYNQ framework. The implementation result indicates the detection FPS can reach 18.