Data-driven self-timed RSFQ demultiplexer

A superconductive rapid single flux quantum (RSFQ) demultiplexer was designed, implemented and tested as an interface between high speed RSFQ circuits and low speed semiconductor circuits. We employed a data-driven self-timed (DDST) architecture to eliminate the timing constraint in the synchronous clocking. In this asynchronous architecture, a clock signal is localized within 2-bit basic demux modules, and complementary data signals are used between the modules to transmit timing information. A larger size of demux can be simply designed by connecting the 2-bit modules in a binary tree structure without any timing consideration. Successful operation has been observed in 4-bit and 8-bit systems at low frequency.