用于两阶段domino和混合静态/domino实现的定时驱动分区

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) Pub Date : 1999-11-07 DOI:10.1109/ICCAD.1999.810631

Min Zhao, S. Sapatnekar

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引用次数: 4

摘要

Domino逻辑是一种高性能电路配置，通常嵌入在静态逻辑环境中，并与时钟方案紧密耦合。本文提供了一种时间驱动的分区算法，该算法将逻辑网络划分为(1)静态和domino实现，以及(2)两相时钟的阶段。此外，还描述了一种有效的静态映射算法。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Timing-driven partitioning for two-phase domino and mixed static/domino implementations

Domino logic is a high-performance circuit configuration that is usually embedded in a static logic environment and tightly coupled with the clocking scheme. In this paper the timing-driven partitioning algorithms that partition a logic network between (1) static and domino implementations, and (2) the phases of a two-phase clock, are provided In addition, an efficient static mapping algorithm is described.

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1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051)

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