{"title":"线性半导体制造物流及其对周期时间的影响","authors":"P. V. D. Meulen","doi":"10.1109/ASMC.2007.4595693","DOIUrl":null,"url":null,"abstract":"Fabs need enhanced flexibility to manufacture smaller lots of wafers to reduce cycle time, inventory and WIP, while maintaining equipment throughput, avoiding cross-contamination and ensuring process integrity and yields. Current equipment has increasing difficulty meeting those demands. This paper describes various factors that could lead to optimized choices for the quantity of wafers in a lot of size smaller than 25 wafers, and shows the potential for decreases in cycle time associated with various equipment configurations and wafer lot sizes.","PeriodicalId":6771,"journal":{"name":"2020 31st Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)","volume":"5 1","pages":"111-116"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Linear Semiconductor Manufacturing Logistics and the Impact on Cycle Time\",\"authors\":\"P. V. D. Meulen\",\"doi\":\"10.1109/ASMC.2007.4595693\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Fabs need enhanced flexibility to manufacture smaller lots of wafers to reduce cycle time, inventory and WIP, while maintaining equipment throughput, avoiding cross-contamination and ensuring process integrity and yields. Current equipment has increasing difficulty meeting those demands. This paper describes various factors that could lead to optimized choices for the quantity of wafers in a lot of size smaller than 25 wafers, and shows the potential for decreases in cycle time associated with various equipment configurations and wafer lot sizes.\",\"PeriodicalId\":6771,\"journal\":{\"name\":\"2020 31st Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)\",\"volume\":\"5 1\",\"pages\":\"111-116\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-06-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 31st Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASMC.2007.4595693\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 31st Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASMC.2007.4595693","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Linear Semiconductor Manufacturing Logistics and the Impact on Cycle Time
Fabs need enhanced flexibility to manufacture smaller lots of wafers to reduce cycle time, inventory and WIP, while maintaining equipment throughput, avoiding cross-contamination and ensuring process integrity and yields. Current equipment has increasing difficulty meeting those demands. This paper describes various factors that could lead to optimized choices for the quantity of wafers in a lot of size smaller than 25 wafers, and shows the potential for decreases in cycle time associated with various equipment configurations and wafer lot sizes.