Atomic drift-less electromigration model for submicron copper interconnects

Electromigration in chip level interconnect is commonly described by atomic drift due to electron-wind force that arises from electron-ion momentum transfer. As an alternative to this model, in early 1980’s, Sah proposed a two dimensional analytical ‘void-surface bond-breaking’ model by dropping the atomic drift term that resulted from electron-wind force (in his book ‘Fundamentals of Solid-State Electronics’) and the rate of change of area of void is computed. Due to the continuous down scaling and evolution of interconnect patterning technologies, the void growth process in modern interconnect becomes more complex and electromigration failures are found to be catastrophic in nature instead of gradual type failures observed in early days. In this work, Sah’s model is revisited from the perspective of its applicability to modern submicron copper interconnects. The electromigration-induced resistance change behavior is analytically derived considering a three-dimensional atomic drift-less model. A good correlation between the findings of our model with experimental observations is presented. Keywords: Analytical model, Copper, Drift-less, Electromigration, Resistance change, Time to failure