FORTIS:为保护ip和ic建立向前信任的综合解决方案

Ujjwal Guin, Qihang Shi, Domenic Forte, M. Tehranipoor
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引用次数: 56

摘要

随着半导体产业的全球化,有必要防止未经授权使用第三方ip (3pip),克隆和不必要的修改第三方ip,以及未经授权生产ic。由于集成电路的复杂性日益增加,片上系统(SoC)设计人员在设计中使用各种3pip来缩短产品上市时间和开发成本,这在SoC设计人员和IP所有者之间产生了信任问题。此外,由于ic是在全球范围内制造的,SoC设计人员将制造合同交给离岸代工厂制造ic,并且几乎无法控制制造过程,包括制造的芯片总数。同样,3PIP所有者无法控制制造芯片的数量和/或其ip在SoC中的使用。现有的研究只是部分地解决了知识产权盗版和集成电路生产过剩的问题,据我们所知,还没有研究考虑到知识产权的过度使用。在本文中,我们提出了一个全面的解决方案,通过确保参与SoC设计和制造过程的所有实体之间的向前信任来防止IP盗版和IC生产过剩。我们提出了一种新的设计流程,以防止IC生产过剩和IP过度使用。我们使用现有的逻辑加密技术来混淆SoC或3PIP的网络列表,并提出修改,以便在芯片激活之前进行制造测试,这对于防止生产过剩是绝对必要的。我们使用非对称和对称密钥加密,以类似于相当好的隐私(PGP)的方式,将密钥从SoC设计者或3PIP所有者传输到芯片。此外,我们还建议将IP摘要(整个IP的加密散列)附加到IP的标头,以防止SoC设计人员修改IP。我们已经证明,我们的方法能够以最小的面积开销为代价抵抗各种攻击。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
FORTIS: A Comprehensive Solution for Establishing Forward Trust for Protecting IPs and ICs
With the advent of globalization in the semiconductor industry, it is necessary to prevent unauthorized usage of third-party IPs (3PIPs), cloning and unwanted modification of 3PIPs, and unauthorized production of ICs. Due to the increasing complexity of ICs, system-on-chip (SoC) designers use various 3PIPs in their design to reduce time-to-market and development costs, which creates a trust issue between the SoC designer and the IP owners. In addition, as the ICs are fabricated around the globe, the SoC designers give fabrication contracts to offshore foundries to manufacture ICs and have little control over the fabrication process, including the total number of chips fabricated. Similarly, the 3PIP owners lack control over the number of fabricated chips and/or the usage of their IPs in an SoC. Existing research only partially addresses the problems of IP piracy and IC overproduction, and to the best of our knowledge, there is no work that considers IP overuse. In this article, we present a comprehensive solution for preventing IP piracy and IC overproduction by assuring forward trust between all entities involved in the SoC design and fabrication process. We propose a novel design flow to prevent IC overproduction and IP overuse. We use an existing logic encryption technique to obfuscate the netlist of an SoC or a 3PIP and propose a modification to enable manufacturing tests before the activation of chips which is absolutely necessary to prevent overproduction. We have used asymmetric and symmetric key encryption, in a fashion similar to Pretty Good Privacy (PGP), to transfer keys from the SoC designer or 3PIP owners to the chips. In addition, we also propose to attach an IP digest (a cryptographic hash of the entire IP) to the header of an IP to prevent modification of the IP by the SoC designers. We have shown that our approach is resistant to various attacks with the cost of minimal area overhead.
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