{"title":"1 GHz低功耗CMOS超再生接收机","authors":"A. Vouilloz, M. Declercq, C. Dehollain","doi":"10.1109/CICC.2000.852641","DOIUrl":null,"url":null,"abstract":"A low-power and low-voltage super-regenerative receiver operating at 1 GHz and implemented in a 0.35 /spl mu/m CMOS process is described. The receiver includes a LNA, a super-regenerative oscillator, an envelope detector, AGC circuitry with sample/hold capability and a baseband amplifier. The die-surface is equal to 0.25 mm/sup 2/. An overall noise figure of 14.7 dB is achieved. The power consumption is less than 1.2 mW at V/sub DD/=1.5 V. A 100 kHz saw tooth quench signal has been used to achieve an interferer rejection of -35.9 dB at 500 kHz from the center frequency.","PeriodicalId":20702,"journal":{"name":"Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"134","resultStr":"{\"title\":\"A low-power CMOS super-regenerative receiver at 1 GHz\",\"authors\":\"A. Vouilloz, M. Declercq, C. Dehollain\",\"doi\":\"10.1109/CICC.2000.852641\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low-power and low-voltage super-regenerative receiver operating at 1 GHz and implemented in a 0.35 /spl mu/m CMOS process is described. The receiver includes a LNA, a super-regenerative oscillator, an envelope detector, AGC circuitry with sample/hold capability and a baseband amplifier. The die-surface is equal to 0.25 mm/sup 2/. An overall noise figure of 14.7 dB is achieved. The power consumption is less than 1.2 mW at V/sub DD/=1.5 V. A 100 kHz saw tooth quench signal has been used to achieve an interferer rejection of -35.9 dB at 500 kHz from the center frequency.\",\"PeriodicalId\":20702,\"journal\":{\"name\":\"Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-05-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"134\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2000.852641\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2000.852641","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low-power CMOS super-regenerative receiver at 1 GHz
A low-power and low-voltage super-regenerative receiver operating at 1 GHz and implemented in a 0.35 /spl mu/m CMOS process is described. The receiver includes a LNA, a super-regenerative oscillator, an envelope detector, AGC circuitry with sample/hold capability and a baseband amplifier. The die-surface is equal to 0.25 mm/sup 2/. An overall noise figure of 14.7 dB is achieved. The power consumption is less than 1.2 mW at V/sub DD/=1.5 V. A 100 kHz saw tooth quench signal has been used to achieve an interferer rejection of -35.9 dB at 500 kHz from the center frequency.