并行算法形式化验证的多核系统建模

M. Desnoyers, P. McKenney, M. Dagenais
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引用次数: 14

摘要

在体系结构级别对并行算法进行建模,可以探索现代处理器弱有序特性的副作用。使用模型检查对这些模型进行正式验证,可以确保即使在最激进的编译器和处理器优化存在的情况下,算法保证仍然有效。本文提出了一个虚拟架构来模拟这种优化的效果。它首先提出了OoOmem框架来对无序内存访问进行建模。然后提出了OoOisched框架来模拟乱序指令调度的影响。使用已知受弱排序影响的弱排序内存交互场景来解释和测试这两个框架。然后,对用户级RCU (Read- Copy Update)同步算法进行了建模。它使用提出的虚拟架构来验证RCU保证确实得到了尊重。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Multi-core systems modeling for formal verification of parallel algorithms
Modeling parallel algorithms at the architecture level enables exploring side-effects of the weakly ordered nature of modern processors. Formal verification of such models with model-checking can ensure that algorithm guarantees will hold even in the presence of the most aggressive compiler and processor optimizations. This paper proposes a virtual architecture to model the effects of such optimizations. It first presents the OoOmem framework to model out-of-order memory accesses. It then presents the OoOisched framework to model the effects of out-of-order instruction scheduling. These two frameworks are explained and tested using weaklyordered memory interaction scenarios known to be affected by weak ordering. Then, modeling of user-level RCU (Read- Copy Update) synchronization algorithms is presented. It uses the virtual architecture proposed to verify that the RCU guarantees are indeed respected.
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