{"title":"毫米波分频锁相环的无分频自动定标","authors":"P. Kurth, Urs Hecht, Enne Wittenhagen, F. Gerfers","doi":"10.1109/MWSCAS47672.2021.9531889","DOIUrl":null,"url":null,"abstract":"This paper presents a novel divider-less scheme for automatic frequency calibration (AFC) of sub-sampling phase-locked loops. The proposed system works without any frequency dividers at all by utilizing the phase information provided by serialized frequency detection through a sub-sampling phase detector. The detector is driven by evenly-spaced reference signals, which enables frequency detection and correction. The AFC is accompanied by a novel divider-less lock detector, which is also sample-based. The proposed system is configured to detect and correct all possible lock frequencies within the oscillator tuning range and is built, apart from the analog front-end, only with synthesizable standard cell CMOS logic.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"85 3 1","pages":"718-721"},"PeriodicalIF":0.0000,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Divider-less Automatic Frequency Calibration for Millimeter-Wave Sub-Sampling Phase-Locked Loops\",\"authors\":\"P. Kurth, Urs Hecht, Enne Wittenhagen, F. Gerfers\",\"doi\":\"10.1109/MWSCAS47672.2021.9531889\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a novel divider-less scheme for automatic frequency calibration (AFC) of sub-sampling phase-locked loops. The proposed system works without any frequency dividers at all by utilizing the phase information provided by serialized frequency detection through a sub-sampling phase detector. The detector is driven by evenly-spaced reference signals, which enables frequency detection and correction. The AFC is accompanied by a novel divider-less lock detector, which is also sample-based. The proposed system is configured to detect and correct all possible lock frequencies within the oscillator tuning range and is built, apart from the analog front-end, only with synthesizable standard cell CMOS logic.\",\"PeriodicalId\":6792,\"journal\":{\"name\":\"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"volume\":\"85 3 1\",\"pages\":\"718-721\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-08-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS47672.2021.9531889\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS47672.2021.9531889","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Divider-less Automatic Frequency Calibration for Millimeter-Wave Sub-Sampling Phase-Locked Loops
This paper presents a novel divider-less scheme for automatic frequency calibration (AFC) of sub-sampling phase-locked loops. The proposed system works without any frequency dividers at all by utilizing the phase information provided by serialized frequency detection through a sub-sampling phase detector. The detector is driven by evenly-spaced reference signals, which enables frequency detection and correction. The AFC is accompanied by a novel divider-less lock detector, which is also sample-based. The proposed system is configured to detect and correct all possible lock frequencies within the oscillator tuning range and is built, apart from the analog front-end, only with synthesizable standard cell CMOS logic.