{"title":"从电路体系结构的角度分析计算系统的安全性","authors":"S. Taheri, Jiann-Shiun Yuan","doi":"10.1109/DESEC.2017.8073843","DOIUrl":null,"url":null,"abstract":"Security and energy are considered as the most important parameters for designing and building an emerging computing system. Today's attacks target different layers of the computing system in both software- and hardware-level. On the other side, introduction of new transistor and memory technologies to the integrated circuits design is beneficial, especially for low energy requirements. However, they might bring new security vulnerabilities as well. Due to these issues, development of novel testing and security checking techniques is obligatory. In this regard, we study two attacks on a computing system within the domain of emerging transistor and memory technologies. A built-in-self-test architecture for testing and security checking an emerging memory is presented. At last, a defense technique is proposed that can identify and detect any abnormal behavior shown from the integrated circuits within the computing system using their current signals.","PeriodicalId":92346,"journal":{"name":"DASC-PICom-DataCom-CyberSciTech 2017 : 2017 IEEE 15th International Conference on Dependable, Autonomic and Secure Computing ; 2017 IEEE 15th International Conference on Pervasive Intelligence and Computing ; 2017 IEEE 3rd International...","volume":"1 1","pages":"166-173"},"PeriodicalIF":0.0000,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Security analysis of computing systems from circuit-architectural perspective\",\"authors\":\"S. Taheri, Jiann-Shiun Yuan\",\"doi\":\"10.1109/DESEC.2017.8073843\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Security and energy are considered as the most important parameters for designing and building an emerging computing system. Today's attacks target different layers of the computing system in both software- and hardware-level. On the other side, introduction of new transistor and memory technologies to the integrated circuits design is beneficial, especially for low energy requirements. However, they might bring new security vulnerabilities as well. Due to these issues, development of novel testing and security checking techniques is obligatory. In this regard, we study two attacks on a computing system within the domain of emerging transistor and memory technologies. A built-in-self-test architecture for testing and security checking an emerging memory is presented. At last, a defense technique is proposed that can identify and detect any abnormal behavior shown from the integrated circuits within the computing system using their current signals.\",\"PeriodicalId\":92346,\"journal\":{\"name\":\"DASC-PICom-DataCom-CyberSciTech 2017 : 2017 IEEE 15th International Conference on Dependable, Autonomic and Secure Computing ; 2017 IEEE 15th International Conference on Pervasive Intelligence and Computing ; 2017 IEEE 3rd International...\",\"volume\":\"1 1\",\"pages\":\"166-173\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"DASC-PICom-DataCom-CyberSciTech 2017 : 2017 IEEE 15th International Conference on Dependable, Autonomic and Secure Computing ; 2017 IEEE 15th International Conference on Pervasive Intelligence and Computing ; 2017 IEEE 3rd International...\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DESEC.2017.8073843\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"DASC-PICom-DataCom-CyberSciTech 2017 : 2017 IEEE 15th International Conference on Dependable, Autonomic and Secure Computing ; 2017 IEEE 15th International Conference on Pervasive Intelligence and Computing ; 2017 IEEE 3rd International...","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DESEC.2017.8073843","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Security analysis of computing systems from circuit-architectural perspective
Security and energy are considered as the most important parameters for designing and building an emerging computing system. Today's attacks target different layers of the computing system in both software- and hardware-level. On the other side, introduction of new transistor and memory technologies to the integrated circuits design is beneficial, especially for low energy requirements. However, they might bring new security vulnerabilities as well. Due to these issues, development of novel testing and security checking techniques is obligatory. In this regard, we study two attacks on a computing system within the domain of emerging transistor and memory technologies. A built-in-self-test architecture for testing and security checking an emerging memory is presented. At last, a defense technique is proposed that can identify and detect any abnormal behavior shown from the integrated circuits within the computing system using their current signals.