D. Sunderland, Gary L. Duncan, Brad J. Rasmussen, Harry E. Nichols, Daniel T. Kain, Lawrence C. Lee, Brian A. Clebowicz, IV RichardW.Hollis, L. Wissel, Tad Wilder
{"title":"用于Thuraya卫星数字信号处理器的Megagate asic","authors":"D. Sunderland, Gary L. Duncan, Brad J. Rasmussen, Harry E. Nichols, Daniel T. Kain, Lawrence C. Lee, Brian A. Clebowicz, IV RichardW.Hollis, L. Wissel, Tad Wilder","doi":"10.1109/ISQED.2002.996791","DOIUrl":null,"url":null,"abstract":"Boeing Satellite Systems and IBM have designed and fabricated a, set of ASIC chip types to perform computation-intensive digital signal processing (DSP) functions on board geosynchronous satellites of the Thuraya mobile communications system. Preparation for this application required comprehensive review of the reliability and space-worthiness of the underlying process and packaging technology. First-pass success on all nine million-plus-gate ASIC designs required extensive model-based simulation and verification. These technologies allowed a four-fold increase in the computational power of the DSP unit over previous systems based on radiation-hardened ASICs, while simultaneously decreasing the number of ASICs required by another factor of five. The first Thuraya satellite is on-orhit, and the whole communications system is performing flawlessly.","PeriodicalId":20510,"journal":{"name":"Proceedings International Symposium on Quality Electronic Design","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"Megagate ASICs for the Thuraya satellite digital signal processor\",\"authors\":\"D. Sunderland, Gary L. Duncan, Brad J. Rasmussen, Harry E. Nichols, Daniel T. Kain, Lawrence C. Lee, Brian A. Clebowicz, IV RichardW.Hollis, L. Wissel, Tad Wilder\",\"doi\":\"10.1109/ISQED.2002.996791\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Boeing Satellite Systems and IBM have designed and fabricated a, set of ASIC chip types to perform computation-intensive digital signal processing (DSP) functions on board geosynchronous satellites of the Thuraya mobile communications system. Preparation for this application required comprehensive review of the reliability and space-worthiness of the underlying process and packaging technology. First-pass success on all nine million-plus-gate ASIC designs required extensive model-based simulation and verification. These technologies allowed a four-fold increase in the computational power of the DSP unit over previous systems based on radiation-hardened ASICs, while simultaneously decreasing the number of ASICs required by another factor of five. The first Thuraya satellite is on-orhit, and the whole communications system is performing flawlessly.\",\"PeriodicalId\":20510,\"journal\":{\"name\":\"Proceedings International Symposium on Quality Electronic Design\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-03-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings International Symposium on Quality Electronic Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED.2002.996791\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Symposium on Quality Electronic Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2002.996791","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Megagate ASICs for the Thuraya satellite digital signal processor
Boeing Satellite Systems and IBM have designed and fabricated a, set of ASIC chip types to perform computation-intensive digital signal processing (DSP) functions on board geosynchronous satellites of the Thuraya mobile communications system. Preparation for this application required comprehensive review of the reliability and space-worthiness of the underlying process and packaging technology. First-pass success on all nine million-plus-gate ASIC designs required extensive model-based simulation and verification. These technologies allowed a four-fold increase in the computational power of the DSP unit over previous systems based on radiation-hardened ASICs, while simultaneously decreasing the number of ASICs required by another factor of five. The first Thuraya satellite is on-orhit, and the whole communications system is performing flawlessly.