{"title":"两级CMOS运算放大器的精确设计方法","authors":"Yushun Guo","doi":"10.1109/APCCAS.2016.7804049","DOIUrl":null,"url":null,"abstract":"This paper presents an accurate design approach for two-stage CMOS operational amplifiers developed based on the usual design procedure. It eliminates the errors existed in design results by employing the accurate MOS model and carrying out the design procedure iteratively. The specifications of the amplifier designed by this approach match exactly with the user specified values. A design example in 0.18μm CMOS technology is given to illustrate the effectiveness of the proposed design approach.","PeriodicalId":6495,"journal":{"name":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"An accurate design approach for two-stage CMOS operational amplifiers\",\"authors\":\"Yushun Guo\",\"doi\":\"10.1109/APCCAS.2016.7804049\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an accurate design approach for two-stage CMOS operational amplifiers developed based on the usual design procedure. It eliminates the errors existed in design results by employing the accurate MOS model and carrying out the design procedure iteratively. The specifications of the amplifier designed by this approach match exactly with the user specified values. A design example in 0.18μm CMOS technology is given to illustrate the effectiveness of the proposed design approach.\",\"PeriodicalId\":6495,\"journal\":{\"name\":\"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCCAS.2016.7804049\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2016.7804049","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An accurate design approach for two-stage CMOS operational amplifiers
This paper presents an accurate design approach for two-stage CMOS operational amplifiers developed based on the usual design procedure. It eliminates the errors existed in design results by employing the accurate MOS model and carrying out the design procedure iteratively. The specifications of the amplifier designed by this approach match exactly with the user specified values. A design example in 0.18μm CMOS technology is given to illustrate the effectiveness of the proposed design approach.
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