Mo, Cr, Ti和W硅肖特基二极管的工艺依赖性和表征

IF 0.1 0 THEATER
K. Moselund, J.E. Freiermuth, P. Dainesi, A. Ionescu
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引用次数: 0

摘要

本文报道了在p型和n型硅片上制造肖特基二极管和欧姆触点的工艺依赖性和电学特性。研究了四种金属:Mo, Ti, W和Cr,因为它们的中隙势垒和与微电子加工的相容性。为此,对以下工艺参数进行了肖特基势垒高度和接触电阻变化的原始研究:(i)预沉积晶片制备,(ii)沉积方法(溅射和电子束蒸发)。(iii)溅射样品的沉积温度,(iv)退火。研究发现,金属沉积前的射频刻蚀增加了p型硅上二极管的接触电阻和势垒高度。这一点非常重要,因为射频蚀刻是微电子和MEMS技术中非常常见的原位清洗工艺。退火可用于恢复暴露于射频蚀刻的晶圆上的势垒高度和接触电阻的值
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Process dependence and characterization of Mo, Cr, Ti and W silicon Schottky diodes
This paper reports on the process dependence and electrical characterization of Schottky diodes and ohmic contacts fabricated on p- and n-type silicon wafers. Four metals are studied: Mo, Ti, W, and Cr due to their mid-gap barriers and compatibility with microelectronics processing. For these an original investigation of the variation in Schottky barrier height and contact resistance is carried out for the following process parameters: (i) pre-deposition wafer preparation, (ii) deposition method (sputtering and e-beam evaporation). (iii) deposition temperature for the sputtered samples, and (iv) annealing. It is found that RF-etching previous to metal deposition increases the contact resistance and the barrier height for diodes on p-type silicon. This is of great importance, since RF-etching is a very common in-situ cleaning process in microelectronic and MEMS technologies. Annealing can be used to restore the values of barrier height and contact resistance on wafers exposed to RF-etching
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Teatro e Storia
Teatro e Storia THEATER-
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