A 14-bit 0.17mm2 SAR ADC in 0.13μm CMOS for high precision nerve recording

This paper presents a high-resolution, area- and power-efficient successive approximate register (SAR) analog-to-digital converter (ADC) for high precision nerve recording. The design features a new “half-split” feedback digital-to-analog converter (DAC) capacitor array with integrated digital calibrations, which allow automatic estimation and calibration of capacitor mismatches. As a result, the SAR ADC precision can be substantially improved given the constraints on circuits area and power consumption. The design has been fabricated in a 0.13μm CMOS process with a core area of 0.17mm2 (280μm×620μm). When measured at 40kSample/s, the ADC consumes 10μW of power and achieves a 72.7dB signal-to-noise-plus-distortion ratio (SNDR) and a 92.1dB spurious free dynamic range (SFDR) over the Nyquist bandwidth. Compared with the noncalibrated ADC, the proposed methods provide the improvements on SNDR, SFDR, and nonlinearity by 12.6dB, 22.7dB, and 4-6 times, respectively.