{"title":"超低电压开关电流反射镜","authors":"Y. Berg, O. Mirmotahari","doi":"10.1109/DDECS.2009.5012138","DOIUrl":null,"url":null,"abstract":"In this paper we present a continuous time ultra low voltage current mirror based on clocked semi-floating-gate transistors used in low-voltage digital CMOS circuits. By imposing offsets to semi-floating-gate nodes the current level may be increased while maintaining a very low supply voltage. The offset voltages are used to shift the effective threshold voltage of the evaluating transistors. The proposed current mirror can operate at supply voltages below 250mV and in continuous time. The current mirror performs an auto zero (chopper) function. The simulated data presented are obtained using the Spectre simulator provided by Cadence and valid for a 90nm CMOS process. We have included an ultra low voltage current mirror with adjustable current levels.","PeriodicalId":6325,"journal":{"name":"2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems","volume":"58 1","pages":"242-245"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Ultra low-voltage switched current mirror\",\"authors\":\"Y. Berg, O. Mirmotahari\",\"doi\":\"10.1109/DDECS.2009.5012138\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we present a continuous time ultra low voltage current mirror based on clocked semi-floating-gate transistors used in low-voltage digital CMOS circuits. By imposing offsets to semi-floating-gate nodes the current level may be increased while maintaining a very low supply voltage. The offset voltages are used to shift the effective threshold voltage of the evaluating transistors. The proposed current mirror can operate at supply voltages below 250mV and in continuous time. The current mirror performs an auto zero (chopper) function. The simulated data presented are obtained using the Spectre simulator provided by Cadence and valid for a 90nm CMOS process. We have included an ultra low voltage current mirror with adjustable current levels.\",\"PeriodicalId\":6325,\"journal\":{\"name\":\"2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems\",\"volume\":\"58 1\",\"pages\":\"242-245\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-04-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DDECS.2009.5012138\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DDECS.2009.5012138","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In this paper we present a continuous time ultra low voltage current mirror based on clocked semi-floating-gate transistors used in low-voltage digital CMOS circuits. By imposing offsets to semi-floating-gate nodes the current level may be increased while maintaining a very low supply voltage. The offset voltages are used to shift the effective threshold voltage of the evaluating transistors. The proposed current mirror can operate at supply voltages below 250mV and in continuous time. The current mirror performs an auto zero (chopper) function. The simulated data presented are obtained using the Spectre simulator provided by Cadence and valid for a 90nm CMOS process. We have included an ultra low voltage current mirror with adjustable current levels.