脉冲静态CMOS的设计技术

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) Pub Date : 2004-05-23 DOI:10.1109/ISCAS.2004.1329425

K. Seshadri, Adrianne Pontarelli, G. Joglekar, G. Sobelman

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引用次数: 0

摘要

本文给出了脉冲静态CMOS电路设计的新成果。特别地，提出了一种新的电路复制方法，它对算术函数的实现特别有用。以阵列乘法器和进位选择加法器为典型设计实例。仿真结果证实，这些脉冲静态CMOS电路工作正确，具有比传统静态设计更高的吞吐量。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Design techniques for Pulsed Static CMOS

This paper gives new results in the design of Pulsed Static CMOS circuits. In particular, a new method of circuit duplication has been proposed which is particularly useful for the implementation of arithmetic functions. An array multiplier and a carry-select adder are used as representative design examples. Simulation results confirm that these Pulsed Static CMOS circuits operate correctly and have greater throughput than traditional static designs.

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2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)

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