低待机功率应用的新型FD SOI器件结构

M. Ma, T. Chao, K. Kao, Jyun-Siang Huang, T. Lei
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引用次数: 0

摘要

本文详细研究了具有源/漏扩展移位和高κ偏移间隔的全耗尽SOI器件。计算结果表明,源漏扩展位移通过利用源漏扩展位移区域的额外电子势垒高度来降低待机功耗,可以显著降低漏电流断流。然而,on-state驱动电流同时也在牺牲。为了克服这一缺点,采用高κ偏置间隔器,通过增强垂直边缘电场,有效地增加导通驱动电流,提高通道压降,降低串联电阻。因此,采用8 nm S/D扩展位移和TiO2偏置间隔的纳米级FD SOI器件可以获得比传统SOI结构低0.003倍的高驱动电流和超低漏电流。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Novel FD SOI Devices Structure for Low Standby Power Applications
In this paper, full-depleted SOI devices with source/drain extension shift and high-κ offset spacer were investigated in detail. The calculated results show that the source/drain extension shift can decrease off-state leakage current Ioff significantly by utilizing the extra electron barrier height in source/drain extension shift region to reduce standby power dissipation. However, the on-state driving current Ion is also sacrificing simultaneously. In order to overcome this drawback, the high-κ offset spacer is used to increase the on-state driving current Ion effectively due to the enhanced vertical fringing electric field to elevate the channel voltage drop and reduce series resistance. Consequently, a nanoscale FD SOI device with 8-nm S/D extension shift and TiO2 offset spacer can possess high driving current Ion and ultra-low leakage current Ioff about 0.003 times lower than conventional SOI structure.
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