用于带内全双工的电平衡双工器，在+10dBm tx功率下，带内失真<-85dBm

ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC) Pub Date : 2015-11-02 DOI:10.1109/ESSCIRC.2015.7313857

B. V. Liempd, B. Hershberg, B. Debaillie, P. Wambacq, J. Craninckx

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引用次数: 18

摘要

当使用电平衡双工器(ebd)为带内全双工提供射频自干扰消除时，双工器中非线性CMOS开关产生的带内失真会导致失真，从而限制了收发器后续抵消方案中额外自干扰消除的剩余空间。为了研究支持带内全双工和传统FDD的下一代无线系统的收发器架构的动态范围限制，在0.18μm SOI CMOS中制作了EBD原型。测量显示，在+10dBm的TX输入功率下，带内失真为-85dBm，足以用于10MHz BW的短距离链路。

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An electrical-balance duplexer for in-band full-duplex with <-85dBm in-band distortion at +10dBm TX-power

When using electrical-balance duplexers (EBDs) to provide RF self-interference cancellation for in-band full-duplex, in-band distortion produced by nonlinear CMOS switches in the duplexer cause distortion that limits the headroom for additional self-interference cancellation in subsequent cancellation schemes in the transceiver. A prototype EBD is fabricated in 0.18μm SOI CMOS to investigate the dynamic range limitations of a transceiver architecture for next-generation wireless systems that supports in-band full-duplex and legacy FDD. Measurements show -85dBm in-band distortion at +10dBm TX input power, enough for short-range links at 10MHz BW.

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ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)

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