一种CMOS 0.18μm 64×64单光子图像传感器,具有像素内11b时间-数字转换器

I. Vornicu, R. Carmona-Galán, Á. Rodríguez-Vázquez
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引用次数: 20

摘要

介绍了一种具有11b时间-数字转换器(TDC)的CMOS 64×64单光子雪崩二极管(SPAD)阵列的设计和特性。它的目标是时间分辨成像,特别是3D成像。实现的像素间距为64μm,填充系数为3.5%。该芯片采用0.18μm标准CMOS技术制造,实现了双重功能:飞行时间估计和光子计数。该成像仪具有可编程的时间分辨率,适用于tdc阵列,从625ps到145ps。最小时间仓的测量精度低于±1LSB DNL和1.7LSB INL。在整个动态范围内,上止点抖动小于1LSB。模具之间的工艺变化和温度通过自动校准被丢弃。每个像素上的快速淬火/恢复电路通过限制雪崩电流来降低功耗。时间门控操作也是可能的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A CMOS 0.18μm 64×64 single photon image sensor with in-pixel 11b time-to-digital converter
The design and characterization of a CMOS 64×64 single-photon avalanche-diode (SPAD) array with in-pixel 11b time-to-digital converter (TDC) is presented. It is targeted for time-resolved imaging, in particular 3D imaging. The achieved pixel pitch is 64μm with a fill factor of 3.5%. The chip was fabricated in a 0.18μm standard CMOS technology and implements a double functionality: Time-of-Flight estimation and photon counting. The imager features a programmable time resolution for the array of TDCs from 625ps down to 145ps. The measured accuracy of the minimum time bin is lower than ±1LSB DNL and 1.7LSB INL. The TDC jitter over the full dynamic range is less than 1LSB. Die-to-die process variation and temperature are discarded by auto-calibration. Fast quenching/restore circuit on each pixel lowers the power consumption by limiting the avalanche currents. Time gatedoperation is possible as well.
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