{"title":"应用于数字极化发射机的CMOS数字功率放大器设计","authors":"Wenming Zheng, Zhiqun Li, Zhennan Li","doi":"10.1109/ICICM54364.2021.9660366","DOIUrl":null,"url":null,"abstract":"This paper presents a fully integrated wideband current-mode digital power amplifier (DPA) for digital polar transmitter in a 22nm RF CMOS process. Current-mode class-D configuration and differential cascode structure are used to obtain high efficiency, noise reduction and high output power with limited supply voltage. A three-coil transformer-based output passive network provides power combining and optimum load impedance transformations simultaneously at two operating frequencies. As a proof-of-concept, a 2.4–5.25 GHz wideband DPA is implemented with supply voltage of 1V for driver circuit and 2.5V for power cells. The simulated peak DPA output power is 30.0dBm/27.5dBm at 2.4GHz/5.25GHz. The simulated peak drain efficiency is 49.8% at 2.4GHz.","PeriodicalId":6693,"journal":{"name":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"157 1","pages":"295-298"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of CMOS Digital Power Amplifier Applied in Digital Polarized Transmitter\",\"authors\":\"Wenming Zheng, Zhiqun Li, Zhennan Li\",\"doi\":\"10.1109/ICICM54364.2021.9660366\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a fully integrated wideband current-mode digital power amplifier (DPA) for digital polar transmitter in a 22nm RF CMOS process. Current-mode class-D configuration and differential cascode structure are used to obtain high efficiency, noise reduction and high output power with limited supply voltage. A three-coil transformer-based output passive network provides power combining and optimum load impedance transformations simultaneously at two operating frequencies. As a proof-of-concept, a 2.4–5.25 GHz wideband DPA is implemented with supply voltage of 1V for driver circuit and 2.5V for power cells. The simulated peak DPA output power is 30.0dBm/27.5dBm at 2.4GHz/5.25GHz. The simulated peak drain efficiency is 49.8% at 2.4GHz.\",\"PeriodicalId\":6693,\"journal\":{\"name\":\"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"volume\":\"157 1\",\"pages\":\"295-298\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-10-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICM54364.2021.9660366\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM54364.2021.9660366","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of CMOS Digital Power Amplifier Applied in Digital Polarized Transmitter
This paper presents a fully integrated wideband current-mode digital power amplifier (DPA) for digital polar transmitter in a 22nm RF CMOS process. Current-mode class-D configuration and differential cascode structure are used to obtain high efficiency, noise reduction and high output power with limited supply voltage. A three-coil transformer-based output passive network provides power combining and optimum load impedance transformations simultaneously at two operating frequencies. As a proof-of-concept, a 2.4–5.25 GHz wideband DPA is implemented with supply voltage of 1V for driver circuit and 2.5V for power cells. The simulated peak DPA output power is 30.0dBm/27.5dBm at 2.4GHz/5.25GHz. The simulated peak drain efficiency is 49.8% at 2.4GHz.