VLSI实现的一个实时小波视频编码器

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044) Pub Date : 2000-05-21 DOI:10.1109/CICC.2000.852726

R. Y. Omaki, Yu Dong, M. H. Miki, M. Furuie, Shohei Yamada, D. Taki, Masaya Tarui, G. Fujita, T. Onoye, I. Shirakawa

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引用次数: 2

摘要

本文描述了一种实时小波视频编码器的结构，重点介绍了存储带宽的减少和高效的VLSI实现。该结构采用改进的二维子带分解方案和并行流水线嵌入式零树小波编码器结构。视频编码器集成在一个0.35 /spl mu/m的3LM芯片上，在一个4.93/spl次/4.93 mm/sup / 2/芯片上使用341 K晶体管，可实时处理720/spl次/480帧30 fps的图像。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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VLSI implementation of a realtime wavelet video coder

The architecture of a realtime wavelet video coder is described, with the main emphasis put on memory bandwidth reduction and efficient VLSI implementation. The proposed architecture adopts a modified 2-D subband decomposition scheme, alongside of a parallelized pipelined Embedded Zerotree Wavelet coder architecture. The video encoder is integrated in a 0.35 /spl mu/m 3LM chip by using 341 K transistors on a 4.93/spl times/4.93 mm/sup 2/ die, which can process 720/spl times/480 30 fps pictures in realtime.

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Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)

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