应用于高性能数字电路的纳米薄膜记忆系统的逻辑设计原理

M. Chakraverty, V. N. Ramakrishnan
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引用次数: 0

摘要

记忆电阻器的掐缩迟滞特性已经被各种材料的堆叠所报道。本文旨在研究在高性能数字电路应用中使用这两种终端忆阻系统的逻辑设计原理。与标准CMOS的逻辑设计相比,用忆阻器进行逻辑设计的好处已被阐明。讨论了将忆阻器与标准CMOS逻辑集成而成的基于与或混合逻辑门的忆阻器的实现和操作。通过详细介绍MAGIC NOR的MAGIC NOR和NAND逻辑门实现,展示了IMPLY和MAGIC逻辑家族。在文章的最后进行了定性比较,得出了本文所研究的每个逻辑族的适用性和应用空间。这项工作还描述了称为MRL(忆阻率逻辑)的混合cmos -忆阻逻辑家族。加上CMOS逆变器,该逻辑家族的OR和and逻辑门以忆阻元件为基础,具有完整的逻辑结构和信号恢复能力。与早期基于忆阻器的逻辑系列相比,MRL系列与传统的CMOS逻辑兼容。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Principles of Logic Design with Nanoscale Thin Film Memristive Systems for High Performance Digital Circuit Applications
The characteristic pinched hysteresis behavior of memristors has been reported by stacks of a variety of materials. This paper aims to examine the principles of logic design using such two terminal memristive systems for high performance digital circuit applications. As against logic design with standard CMOS, the benefits of logic design with memristors have been stated. The realization and operation of memristor based AND and OR hybrid logic gates obtained by integrating memristors with standard CMOS logic have been discussed. The IMPLY and MAGIC logic families have been demonstrated by covering MAGIC NOR and NAND logic gate implementation with MAGIC NOR in detail. A qualitative comparison has been drawn towards the end of the paper to conclude on the suitability and application space for each of the logic families studied in this paper. This work also describes the hybrid CMOS-memristive logic family known as MRL (Memristor Ratioed Logic). With the addition of CMOS inverters, this logic family's OR and AND logic gates, which are based on memristive components, are given a full logic structure and signal restoration. The MRL family, in contrast to earlier memristor-based logic families, is compatible with conventional CMOS logic.
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