4×12 Gb/s 0.96 pJ/b/lane模拟- iir串扰对消和信号复用接收器，用于65nm CMOS单端I/ o

2012 Symposium on VLSI Circuits (VLSIC) Pub Date : 2012-06-13 DOI:10.1109/VLSIC.2012.6243829

Taehyoun Oh, R. Harjani

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引用次数: 9

摘要

通过模拟iir网络实现的串扰消除和信号再利用(XTCR)算法显着提高了4个紧密间隔的单端PCB走线的信号完整性。在65 nm CMOS中实现的XTCR原型设计在10-8 BER下将4通道的平均水平和垂直眼开口分别提高了37.5%和26.4%，而功耗仅为0.96 pJ/b/lane。

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4×12 Gb/s 0.96 pJ/b/lane analog-IIR crosstalk cancellation and signal reutilization receiver for single-ended I/Os in 65 nm CMOS

A crosstalk cancellation and signal reutilization (XTCR) algorithm implemented with analog-IIR networks dramatically improves signal integrity across 4 closely-spaced single-ended PCB traces. The prototype XTCR design implemented in 65 nm CMOS improves the measured average horizontal and vertical-eye openings of the 4 channels by 37.5% and 26.4% at 10-8 BER, while consuming only 0.96 pJ/b/lane.

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2012 Symposium on VLSI Circuits (VLSIC)

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