APRES:利用gpu上的负载特性来提高缓存效率

Yunho Oh, Keunsoo Kim, M. Yoon, Jong Hyun Park, Yongjun Park, W. Ro, M. Annavaram
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引用次数: 29

摘要

较长的内存延迟和有限的吞吐量成为GPGPU应用的性能瓶颈。延迟需要数百个周期,这很难通过简单地交错数十次warp执行来隐藏。虽然缓存层次结构有助于减少内存系统的压力,但是大量的线程级并行(TLP)通常会导致过度的缓存争用。为了提高GPU的缓存效率,本文提出了自适应预取和调度(APRES)算法。APRES依靠以下观察结果。首先,某些静态加载指令倾向于生成具有非常高局部性的内存地址。其次,虽然负载没有局部性,但访问地址仍然可以表现出高度跨越式的访问模式。第三,无论warp ID如何,局部性行为都趋于一致。APRES调度扭曲,以便在任何缓存丢失生成之前生成尽可能多的缓存命中。这是为了在许多warp争用一条缓存线时最小化缓存抖动。然而,要实现这个操作,需要预测在不久的将来哪个warp会命中缓存。APRES没有直接预测每次warp的缓存命中/未命中,而是创建了一组warp,这些warp将在不久的将来执行相同的加载指令。基于第三个观察,我们期望局部性行为在群体中的所有翘曲中是一致的。如果组中第一次执行的warp命中缓存,则加载被认为是高局部性类型,并且APRES优先考虑组中的所有warp。组优先级导致连续的缓存命中,因为分组扭曲可能访问相同的缓存行。如果第一次warp错过了缓存,则将加载视为跨步类型,并且APRES为组中的其他warp生成预取请求。之后,APRES优先预取目标warp,以便将需求请求合并到Miss Status Holding Register (MSHR)中,或者可以访问预取行。在内存密集型应用程序中,与基准GPU相比,APRES实现了31.7%的性能提升,与现有warp调度和预取方法的最佳组合相比,APRES实现了7.2%的额外加速提升。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
APRES: Improving Cache Efficiency by Exploiting Load Characteristics on GPUs
Long memory latency and limited throughput become performance bottlenecks of GPGPU applications. The latency takes hundreds of cycles which is difficult to be hidden by simply interleaving tens of warp execution. While cache hierarchy helps to reduce memory system pressure, massive Thread-Level Parallelism (TLP) often causes excessive cache contention. This paper proposes Adaptive PREfetching and Scheduling (APRES) to improve GPU cache efficiency. APRES relies on the following observations. First, certain static load instructions tend to generate memory addresses having very high locality. Second, although loads have no locality, the access addresses still can show highly strided access pattern. Third, the locality behavior tends to be consistent regardless of warp ID. APRES schedules warps so that as many cache hits generated as possible before any cache misses generated. This is to minimize cache thrashing when many warps are contending for a cache line. However, to realize this operation, it is required to predict which warp will hit the cache in the near future. Without directly predicting future cache hit/miss for each warp, APRES creates a group of warps that will execute the same load instruction in the near future. Based on the third observation, we expect the locality behavior is consistent over all warps in the group. If the first executed warp in the group hits the cache, then the load is considered as a high locality type, and APRES prioritizes all warps in the group. Group prioritization leads to consecutive cache hits, because the grouped warps are likely to access the same cache line. If the first warp missed the cache, then the load is considered as a strided type, and APRES generates prefetch requests for the other warps in the group. After that, APRES prioritizes prefetch targeted warps so that the demand requests are merged to Miss Status Holding Register (MSHR) or prefetched lines can be accessed. On memory-intensive applications, APRES achieves 31.7% performance improvement compared to the baseline GPU and 7.2% additional speedup compared to the best combination of existing warp scheduling and prefetching methods.
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