采用负米勒电容的高速CMOS运算放大器设计技术

Q3 Arts and Humanities
Boaz Shem-Tov, M. Kozak, E. Friedman
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引用次数: 41

摘要

本文提出了一种高速CMOS运算放大器的设计方法。运算放大器由一个操作跨导放大器(OTA)和一个输出缓冲器组成。OTA通过连接在缓冲器的输入和输出之间的电容器进行补偿。运算放大器采用0.18 /spl mu/m标准数字CMOS技术设计,具有86 dB直流增益。对于2 pF和1 k/spl ω /负载的并联组合,单位增益频率和相位裕度分别为392 MHz和73/spl度/。与传统补偿方法相比,在相同负载条件下,该补偿方法的单位增益频率提高了1.5倍,相裕度提高了35/spl度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A high-speed CMOS op-amp design technique using negative Miller capacitance
A method is presented in this paper for the design of high speed CMOS operational amplifiers (op-amp). The op-amp consists of an operational transconductance amplifier (OTA) followed by an output buffer. The OTA is compensated with a capacitor connected between the input and output of the buffer. An op-amp is designed in a 0.18 /spl mu/m standard digital CMOS technology and exhibits 86 dB DC gain. The unity gain frequency and phase margin are 392 MHz and 73/spl deg/, respectively, for a parallel combination of 2 pF and 1 k/spl Omega/ load. As compared to the conventional approach, the proposed compensation method results in a 1.5 times increase in unity gain frequency and a 35/spl deg/ improvement in the phase margin under the same load conditions.
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来源期刊
Giornale di Storia Costituzionale
Giornale di Storia Costituzionale Arts and Humanities-History
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