S. Takagi, K. Wada, N. Fujii, M. Ismail, D. Y. Kim
{"title":"一种新型的面积高效MOSFET-C滤波器设计方法","authors":"S. Takagi, K. Wada, N. Fujii, M. Ismail, D. Y. Kim","doi":"10.1109/APCAS.1996.569217","DOIUrl":null,"url":null,"abstract":"This paper proposes a novel area-efficient and cost-effective design methodology for MOSFET-C continuous-time filters. The new methodology reduces the number of MOS transistors used in the previously reported work by almost a factor of two. A third-order leapfrog low-pass Chebyschev filter is realized and simulated as an example to demonstrate the validity of the new design methodology.","PeriodicalId":20507,"journal":{"name":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1996-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A novel area-efficient MOSFET-C filter design methodology\",\"authors\":\"S. Takagi, K. Wada, N. Fujii, M. Ismail, D. Y. Kim\",\"doi\":\"10.1109/APCAS.1996.569217\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a novel area-efficient and cost-effective design methodology for MOSFET-C continuous-time filters. The new methodology reduces the number of MOS transistors used in the previously reported work by almost a factor of two. A third-order leapfrog low-pass Chebyschev filter is realized and simulated as an example to demonstrate the validity of the new design methodology.\",\"PeriodicalId\":20507,\"journal\":{\"name\":\"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-11-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCAS.1996.569217\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCAS.1996.569217","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel area-efficient MOSFET-C filter design methodology
This paper proposes a novel area-efficient and cost-effective design methodology for MOSFET-C continuous-time filters. The new methodology reduces the number of MOS transistors used in the previously reported work by almost a factor of two. A third-order leapfrog low-pass Chebyschev filter is realized and simulated as an example to demonstrate the validity of the new design methodology.