采用40nm CMOS技术的低功耗高数据速率GHz范围接收器

2011 IEEE International Conference of Electron Devices and Solid-State Circuits Pub Date : 2011-12-29 DOI:10.1109/EDSSC.2011.6117690

Xiaopeng Yu, Zhenghao Lu, W. M. Lim, K. Yeo, Yang Liu, X. Yan, Changhui Hu

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引用次数: 1

摘要

本文提出了一种低功耗、高数据速率的GHz频段OOK接收机。采用基于注入锁环振荡器的本振进行数据解调。该接收器采用标准的40nm CMOS工艺，能够以50 Mbps的数据速率恢复1 - 4ghz载波频率的输入信号，同时功耗低于300 μ W。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Low power high data rate GHz range receiver in 40nm CMOS technology

In this paper, a low power high data rate OOK receiver at GHz range is proposed. An injected locked ring oscillator based local oscillator is used for data demodulation. Implemented with a standard 40nm CMOS process, the receiver is able to recover an input signal with 1–4 GHz carrier frequency at the data rate of 50 Mbps while consuming less than 300 µW.

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2011 IEEE International Conference of Electron Devices and Solid-State Circuits

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