{"title":"扩展自适应多速率宽带(AMR-WB+)语音编解码器的最佳实时DSP实现","authors":"R. Nagal, M. Kumar, R. Jain","doi":"10.1109/TENCON.2008.4766697","DOIUrl":null,"url":null,"abstract":"Speech transmission are the most used form of communications in the personal communication systems and spectral efficiency is the very important aspect in wireless communication system and so low bit rate speech codecs play an important role in determining the systempsilas spectral efficiency. The AMR-WB+ (Extended Adaptive Multirate Wide Band) speech codec provides unique performance at very low bit rates from below 10 kbps to 24 kbps. The speech codec has high robustness to withstand high-bit error rates and performs well in tandeming conditions, hence leading to efficient bandwidth utilization and increased channel capacity. In this paper, several optimization techniques are presented for efficient implementation of AMR-WB+ on real time digital signal processor TMS320C6713, with an aim to overcome the limitation of computational burden and also scaling this application for enhanced speed to process more number of channels. The work presented here is the optimization of decoder part of AMR-WB+ speech codec and a step to minimize its MIPS (Millions Instruction per second), which includes debugging profiling and optimization with the help of code composer studio (CCS an IDE for TMS320C6713) and finally the implementation of the decoder on DSP Processor TMS320C6713. These techniques are in general implemented in any DSP processor platform.","PeriodicalId":22230,"journal":{"name":"TENCON 2008 - 2008 IEEE Region 10 Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Optimal real time DSP implementation of Extended Adaptive Multirate Wide Band (AMR-WB+) Speech Codec\",\"authors\":\"R. Nagal, M. Kumar, R. Jain\",\"doi\":\"10.1109/TENCON.2008.4766697\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Speech transmission are the most used form of communications in the personal communication systems and spectral efficiency is the very important aspect in wireless communication system and so low bit rate speech codecs play an important role in determining the systempsilas spectral efficiency. The AMR-WB+ (Extended Adaptive Multirate Wide Band) speech codec provides unique performance at very low bit rates from below 10 kbps to 24 kbps. The speech codec has high robustness to withstand high-bit error rates and performs well in tandeming conditions, hence leading to efficient bandwidth utilization and increased channel capacity. In this paper, several optimization techniques are presented for efficient implementation of AMR-WB+ on real time digital signal processor TMS320C6713, with an aim to overcome the limitation of computational burden and also scaling this application for enhanced speed to process more number of channels. The work presented here is the optimization of decoder part of AMR-WB+ speech codec and a step to minimize its MIPS (Millions Instruction per second), which includes debugging profiling and optimization with the help of code composer studio (CCS an IDE for TMS320C6713) and finally the implementation of the decoder on DSP Processor TMS320C6713. These techniques are in general implemented in any DSP processor platform.\",\"PeriodicalId\":22230,\"journal\":{\"name\":\"TENCON 2008 - 2008 IEEE Region 10 Conference\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"TENCON 2008 - 2008 IEEE Region 10 Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TENCON.2008.4766697\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"TENCON 2008 - 2008 IEEE Region 10 Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TENCON.2008.4766697","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optimal real time DSP implementation of Extended Adaptive Multirate Wide Band (AMR-WB+) Speech Codec
Speech transmission are the most used form of communications in the personal communication systems and spectral efficiency is the very important aspect in wireless communication system and so low bit rate speech codecs play an important role in determining the systempsilas spectral efficiency. The AMR-WB+ (Extended Adaptive Multirate Wide Band) speech codec provides unique performance at very low bit rates from below 10 kbps to 24 kbps. The speech codec has high robustness to withstand high-bit error rates and performs well in tandeming conditions, hence leading to efficient bandwidth utilization and increased channel capacity. In this paper, several optimization techniques are presented for efficient implementation of AMR-WB+ on real time digital signal processor TMS320C6713, with an aim to overcome the limitation of computational burden and also scaling this application for enhanced speed to process more number of channels. The work presented here is the optimization of decoder part of AMR-WB+ speech codec and a step to minimize its MIPS (Millions Instruction per second), which includes debugging profiling and optimization with the help of code composer studio (CCS an IDE for TMS320C6713) and finally the implementation of the decoder on DSP Processor TMS320C6713. These techniques are in general implemented in any DSP processor platform.